- Full-power domain (FPD) with APU and other functional units and interconnect
- Low-power domain (LPD) with RPU and functional units and interconnect
- Platform management controller (PMC) functional units and interconnect
- DDR memory controller
- Programmable logic (PL) and building blocks
- Integrated and embedded memory
- Integrated Hardware
- Integrated Peripheral Options
- Integrated Hardware Options
- Test and debug
The processing system includes a multi-CPU core real-time processing unit (RPU) and a multi-CPU core application processing unit (APU). These provide programmers with real-time and application operating environments. The RPU is in the low-power domain (LPD) and the APU is in the full-power domain (FPD).
The RPU consists of two Arm® Cortex®-R5F CPU cores with lockstep option and two or four Arm Cortex-A72 CPU cores.
There are many integrated component and peripheral options in the Versal adaptive SoC that are summarized in the Versal Architecture and Product Data Sheet: Overview (DS950) based on device series and device within a series.