Processor Memory Datapaths

Versal ACAP Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2022-04-26
Revision
1.4 English

AXI Master Access to CPU Memory

The TCMs can be loaded with code and data coefficients by another system master when the RPU is in its Halt mode. The RPU and TCMs must be powered on and the RPU must be out of reset.

Datapaths

The datapaths to these memories are shown in the following figure.

Figure 1. CPU Memory Datapaths