QSPI Clocks

Versal ACAP Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2022-04-26
Revision
1.4 English

The QSPI controller includes the following clocks:

  • QSPI_REF_CLK for controller reference clock, see CRP QSPI_REF_CTRL register
  • PMC_IRO_CLK for AXI DMA interface
  • PMC_LSBUS_CLK for APB programming interface
  • QSPIx_CLK for the I/O interface, two are present

The clock for the flash device I/O interface comes from the QSPI baud-rate generator. The baud-rate generator takes in the QSPI_REF_CLK clock and divides it down using the GQSPI_Cfg [BAUD_RATE_DIV] field to generate QSPIx_CLK.

Clock frequency guidelines are included in the Flash Memory Controller Clock Frequency Requirements section.