QSPI Flash Boot Interface

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
Release Date
1.6 English

The MIO pin options for the boot modes are listed in the MIO Boot Interfaces table. All MIO pin signal options are listed in the MIO-at-a-Glance Tables section.

Interface Connection Diagram

The QSPI flash interface connections are shown in the QSPI Flash Interface Diagrams section.

In QSPI24/QSPI32 boot modes, the BootROM configures MIO pins [0:5] for the single device/dual-stacked flash interface and MIO pins [0:5, 7:12] for the dual-parallel flash interface.

Interface Signals

The QSPI interface signals are listed in the QSPI Flash Interface Signals section of the OSPI flash memory controller chapter.

Note: The loopback clocks signal (LPBK) is not configured by the BootROM. The PLM firmware can enable the LPBK for higher frequency.