QSPI Flash Boot Sequences

Versal Adaptive SoC Technical Reference Manual (AM011)

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1.6 English

The BootROM can detect the intended I/O width of the QSPI interface using the width detection parameter value (0xAA995566) and the image identification parameter value (0x584C4E58) in an 8-bit parallel configuration.

4-bit I/O Detection

During the QSPI boot process, the BootROM configures the controller with 4-bit I/O. The BootROM reads the first (and, possibly, the only) QSPI device in 1-bit mode. It reads the width detection parameter in the BootROM header. If the width detection parameter is equal to 0xAA995566, the BootROM assumes it found a valid header that is requesting a 4-bit I/O configuration. It might be one device or it might be a dual 4-bit stacked configuration. In the latter case, the stacked (second) device is always ignored by the BootROM, but it might be accessed by user code. After reading the width detection parameter in 1-bit mode, the BootROM attempts to read the parameter in 4-bit mode. If 4-bit mode fails, it tries 2-bit mode. After this, the BootROM will use the 8-bit I/O bus width to attempt access to the QSPI device.

8-bit I/O Detection

In the QSPI 8-bit parallel configuration, the BootROM only reads the even bits of the BootROM header because it is only accessing the first device and the header is split across both devices. The BootROM forms a 32-bit word that includes the even bits of the width detection (0x20) and image identification (0x24) parameter values. When the BootROM detects this condition, it assumes the system uses the 8-bit parallel configuration and programs the controller for the x8 operating mode. This mode is used for the rest of the boot process.