References

These documents provide supplemental material useful with this guide:

1. Versal ACAP product data sheet:
   • Versal Architecture and Product Data Sheet: Overview (DS950)
2. Versal ACAP electrical data sheets:
   • Versal Prime Series Data Sheet: DC and AC Switching Characteristics (DS956)
   • Versal AI Core Series Data Sheet: DC and AC Switching Characteristics (DS957)
3. Versal ACAP GTY and GTYP Transceivers Architecture Manual (AM002)
4. Versal ACAP Clocking Resources Architecture Manual (AM003)
5. Versal ACAP DSP Engine Architecture Manual (AM004)
6. Versal ACAP Configurable Logic Block Architecture Manual (AM005)
7. Versal ACAP System Monitor Architecture Manual (AM006)
8. Versal ACAP Memory Resources Architecture Manual (AM007)
9. Versal ACAP AI Engine Architecture Manual (AM009)
10. Versal ACAP SelectIO Resources Architecture Manual (AM010)
11. Versal ACAP Register Reference (AM012)
12. Versal ACAP CPM CCIX Architecture Manual (AM016)
13. Versal ACAP Design Guide (UG1273)
14. Bootgen User Guide (UG1283)
15. Versal ACAP System Software Developers Guide (UG1304)
16. Xilinx AI Engine and Their Applications (WP506)
17. Versal ACAP Programmable Network on Chip and Integrated Memory Controller LogiCORE IP Product Guide (PG313)
18. Versal ACAP CPM Mode for PCI Express Product Guide (PG346)
19. Versal ACAP CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)
20. Versal ACAP PCB Design User Guide (UG863)

Cache Coherent Interconnect

1. CCI-500 Guide for ACE-Lite and ACE Interfaces
2. Arm CoreLink CCI-500 Cache Coherent Interconnect Technical Reference Manual
3. AMBA AXI and ACE Protocol Specification

Additional References

1. Recommendation for Applications Using Approved Hash Algorithms NIST Special Publication 800-107
2. SHA-3 Standard: Permutation-Based Hash and Extendable-Output Functions, NIST FIPS PUB 202