Register Module Programming Interfaces

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

The APB and NPI programming interfaces enable software to access registers that control the interconnect and all the other system units. The APB programming interfaces are located throughout the PMC and PS on the main and IOP interconnects. The NPI programming interface is controlled by a single host located in the PMC. The NPI host is controlled by software using register accesses. Both interfaces provide address decode error reporting. The programming interface summary includes:

  • APB, AXI: 32-bit RW, multiple interface locations (see APB, AXI Programming Interfaces)
  • NPI: 32-bit RW with burst, single host attached to the PMC interconnect