The ClkMon registers include a set of interrupts registers and four registers for each of the 8 channels.
The ClkMon registers are included in the CRP register module. The base
address for the CRP registers is
offset addresses for ClkMon are listed in the table.
0x0260, channel 1 at
|Register Name||Number of Registers||Offset Address||Access Type||Description|
|ClkMon interrupt registers for out of range and internal counter overflow|
|CLKMON0_THRESH_U (0 to 7)||8||
||RW||Upper threshold count|
|CLKMON0_THRESH_L (0 to 7)||8||
||RW||Lower threshold count|
|CLKMON0_BASE (0 to 7)||8||
||RW||Number of base reference clocks in base time period|
|CLKMON0_CTRL (0 to 7)||8||
||RW||Select reference and monitor clocks, start sample, status idle state|