Reset Hardware

Versal ACAP Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2022-04-26
Revision
1.4 English
Table 1. I2C Reset Hardware
Task Register Register Field Bits Operation
Disable all interrupts IDR, 0x28 All 9:0 2FFh
Clear Interrupt Status
Read interrupt status register ISR, 0x10 All 9:0 Read operation
Write back interrupt status register ISR, 0x10 All 9:0 Clear bits detected as set
Clear hold, master enable, and acknowledge bits.
Read control register Control, 0x00 All 15:0 Read operation
Clear bits Control, 0x00 CLR_FIFO, HOLD, ACK_EN, MS 6, 4, 3, and 1 (~(0x0015) | 0x0040)(hex)
Reset time out Time_Out, 0x1C All 7:0 FFh
Clear transfer size register Transfer_Size, 0x14 Transfer_Size 7:0 Write 00h
Clear status register
Read status register ISR, 0x04 All 8:0 Read operation
Write back status register ISR, 0x04 All 8:0 Read value
Reset configuration register Control, 0x00 All 15:0 Write 0000h