The SBI interface is a Xilinx proprietary interface that buffers incoming configuration data from the supervised boot modes (JTAG and SelectMAP). The incoming data is then fetched by the RCU or PPU using one of the platform management controller DMAs for further processing and loading to the configuration interfaces. The SBI requires flow control to prevent overflow of the internal buffer using a BUSY pin. For SelectMAP, when BUSY is asserted, the external controller must stop sending data within 24 cycles. The SBI datapath and interface options are shown in the following figure. The HSDP, SelectMAP, and JTAG data are adjusted to the 128-bit bus for processing.
Figure 1. SBI Datapath