SD Signals

Versal ACAP Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2022-04-26
Revision
1.4 English

In SD boot modes, MIO[26, 29, 30:33] for SD1 (2.0), MIO[26:27, 29:36] for SD1 (3.0), or MIO[38, 40:48] for SD0 (3.0) are configured by the BootROM to use:

  • Default drive strength (8 mA)
  • Default slew rate (slow)
  • Default weak pull-ups (enabled)
  • Enables the Schmitt trigger
  • Disables the master 3-state

The remaining MIOs are not set by the BootROM and remain at their default state. If a secure lockdown occurs during boot, the BootROM sets the PMC_GLOBAL TRISTATE_OVERRIDE register to force all I/Os into a tristate mode. This register is then reserved for use by the PLM firmware.

The following table lists the bidirectional PMC multiplexed I/Os (MIOs) and their functions used in the SD boot mode setup.

Table 1. SD1 (2.0) Boot Mode Signals
PMC MIO Pin Signal Name Description
26 SD1_CLK SD1 clock output.
29 SD1_CMD SD1 command.
30 SD1_DATA[0] Data pin used in SD1 boot mode.
31 SD1_DATA[1] Data pin used in SD1 boot mode.
32 SD1_DATA[2] Data pin used in SD1 boot mode.
33 SD1_DATA[3] Data pin used in SD1 boot mode.
28 SD1_DETECT Provides a card detect input that reflects the state of the mechanical switch on the SD card. The card detect signal is not required for primary boot. Not supported by BootROM.
50 SD1_WP Write protect input signal. The write protect signal is not required for primary boot. Not supported by BootROM.
51 SD1_BUSPWR Bus power output that can be used to gate or reset the SD card power on the board. The bus power signal is not required for primary boot. Not supported by BootROM.
Table 2. SD1 (3.0) Boot Mode Signals
PMC MIO Pin Signal Name Description
26 SD1_CLK SD1 clock output.
29 SD1_CMD SD1 command.
30 SD1_DATA[0] Data pin used in SD1 boot mode.
31 SD1_DATA[1] Data pin used in SD1 boot mode.
32 SD1_DATA[2] Data pin used in SD1 boot mode.
33 SD1_DATA[3] Data pin used in SD1 boot mode.
34 SD1_SEL Select signal output is automatically asserted when SD3.0 mode is selected. Select signal enables an external voltage translator to switch from 3.3V to 1.8V to operate the SD card at the highest performance supported.
35 SD1_DIR_CMD DIR CMD output determines if the command is an input or output.
36 SD1_ DIR0 DIR0 output determines if Data[0] is an input or output.
27 SD1_DIR1 DIR1 output determines if Data[3:1] direction is an input or output.
28 SD1_DETECT Provides a card detect input that reflects the state of the mechanical switch on the SD card. The card detect signal is not required for primary boot. Not supported by BootROM.
50 SD1_WP Write protect input signal. The write protect signal is not required for primary boot. Not supported by BootROM.
51 SD1_BUSPWR Bus power output that can be used to gate or reset the SD card power on the board. Not required for primary boot. BootROM configures the bus power signal in SD1 (3.0) boot mode.
Table 3. SD0 (3.0) Boot Mode Signals
PMC MIO Pin Signal Name Description
38 SD0_CLK SD0 clock output.
40 SD0_CMD Command signal.
41 SD0_DATA[0] Data pin used in SD0 boot mode.
42 SD0_DATA[1] Data pin used in SD0 boot mode.
43 SD0_DATA[2] Data pin used in SD0 boot mode.
44 SD0_DATA[3] Data pin used in SD0 boot mode.
45 SD0_SEL Select signal is automatically asserted when SD3.0 mode is selected. Select signal enables an external voltage translator to switch from 3.3V to 1.8V to operate the SD card at the highest performance supported.
46 SD0_DIR_CMD DIR_CMD output, determines if the command is an input or output.
47 SD0_DIR0 DIR0 output determines if Data[0] is an input or output.
48 SD0_DIR1 DIR1 output determines if Data[3:1] direction is an input or output.
39 SD0_DETECT Provides a card detect input that reflects the state of the mechanical switch on the SD card. The card detect signal is not required for primary boot. Not supported by BootROM.
37 SD0_WP Write protect input signal. The write protect signal is not required for primary boot. Not supported by BootROM.
49 SD0_BUSPWR Bus power output that can be used to gate or reset the SD card power on the board. Not required for primary boot. BootROM configures the bus power signal in SD0 (3.0) boot mode.