SD3.0 Interface

Versal ACAP Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2022-04-26
Revision
1.4 English

The following figure shows the SD1 (3.0) boot mode interface from a single SD flash device using a voltage level translator.

The PMC_MIO Bank1 is expected to be at 1.8V for SD 3.0 boot modes. In SD 3.0 boot modes, an external voltage level translator is needed to enable the controller to initially interface at 3.3V with the SD card and then 1.8V for high-speed transfers.

Figure 1. SD1 (3.0) Interface Example

This figure shows the requirement of a voltage level translator. The SD1_DETECT, SD1_WP, and SD1_BUSPWR are optional interface signals that are not required for primary boot. If the SD1_DETECT and SD1_WP signals are used, connecting them to the voltage level translator as shown in the figure can provide ESD protection and pull-ups.

The SD0 (3.0) controller interface setup is the same except the boot mode setting is MODE[3:0]=0011 and the SD0 named signals are used instead of SD1.