The SelectMAP boot interface uses dedicated and multiplexed I/O (MIO) pins.
Dedicated I/O Signals
The Dedicated Boot Signals section shows the SelectMAP dedicated boot mode pins.
The MIO-at-a-Glance Tables section provides information on the SelectMAP PMC MIO signals.
The I/O buffers for the SelectMAP MIO pins are programmed by the BootROM. See the MIO Boot Interface Pin Buffer Settings section.
The following table lists the SelectMAP interface pins and their functions. These pins are only available via MIO.
|SelectMAP clock input.
|Chip select input enables the SelectMAP bus.
When SMAP_CS_b is Low, the SelectMAP boot interface is enabled.
When SMAP_CS_b is High, the SelectMAP boot interface is disabled.
|Read/Write input that controls whether the data pins
are inputs or outputs.
When RDWR_b is Low, an external device drives the SelectMAP data bus. Write operation solution support is available for boot and configuration.
When RDWR_b is High, the Versal device drives the SelectMAP data bus, regardless of the SMAP_CS_b level. Read operation (SelectMAP readback) solution support is not available.
|Busy output is High when there are 24 clock cycles left before the SBI FIFO data buffer overflows.
|Data pins used for the 8-bit, 16-bit, and 32-bit SelectMAP interface.
|Data pins used for the 16-bit and 32-bit SelectMAP interface.
|Data pins used for the 32-bit SelectMAP interface.