SelectMAP Pattern and Bit Order

Versal ACAP Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2022-04-26
Revision
1.4 English

The Versal ACAP programmable device image (PDI) boot header is read by the RCU BootROM to determine the SelectMAP bus width. The first 16 bytes in the PDI boot header determine the SelectMAP bus width.

The SelectMAP bus detection PDI pattern options include:
8-bit bus width 00 00 00 DD 11 22 33 44 55 66 77 88 99 AA BB CC
16-bit bus width 00 00 DD 00 22 11 44 33 66 55 88 77 AA 99 CC BB
32-bit bus width DD 00 00 00 44 33 22 11 88 77 66 55 CC BB AA 99

SelectMAP Bit Order

The SelectMAP interface is typically driven by a user application residing on a microprocessor, microcontroller, or another FPGA or SoC. For these applications, it is important to understand how the data ordering in the programmable device image corresponds to the data ordering expected by the Versal ACAP interface. In SelectMAP 8-bit mode, the programmable device image data is loaded at one byte per clock with the bits of each byte presented to the SelectMAP pins. The following table shows how to load the SelectMAP PDI data bits onto the SelectMAP data pins.

Table 1. SelectMAP Bit Order
SelectMAP Signal Names (SMAP_IO[#]) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
32-bit PDI data order 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
16-bit PDI data order                                 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8
8-bit PDI data order                                                 7 6 5 4 3 2 1 0