Setup Master

Versal ACAP Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2022-04-26
Revision
1.4 English
Table 1. I2C Setup Master
Task Register Register Field Bits Operation
Read control register Control, 0x00 All 15:0 Read operation
If [HOLD] is set = 1, then check if bus is busy (see Check Bus is Busy). If bus is busy, return.
Setup master Control, 0x00 CLR_FIFO, HOLD, ACK_EN, NEA, MS 6, 4, 3, 2,
and 1 5Eh
For Receiver Role
Enable master receiver Control, 0x00 RW 0 1
For Transmitter Role
Enable master transmitter Control, 0x00 RW 0 0
Disable all interrupts IDR, 0x28 All 9:0 2FFh