After reset, the controller is disabled and can be configured as needed.
There are several ways to reset the controller. These are described in the Controller Reset section of this chapter.
The controller enable/disable function is used by software for several purposes.
Idle Status Bit
After a flash memory access has been initiated, software must wait for it to be completed before another access is initiated. The [IDLE] status bit is asserted after the controller has finished performing the flash memory access. In direct access mode, software does not need to check the idle status between successive accesses.
- Initiate a new access mode (e.g., from direct to DMA mode)
- Set up polling of the flash memory status during flash write transactions when Indirect_Write_Ctrl [wr_queued] bit is set. In this case, the software waits for queued write to finish.
For read transactions, there is no need to wait for the flash status.