System Error Accumulator Registers

Versal ACAP Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2022-04-26
Revision
1.4 English

The system error accumulator registers are included in two register modules:

Table 1. System Error Accumulator Registers
Type Register Names Access Type Description
PMC Accumulator PSM Accumulator
Status



            PMC_ERR1_STATUS
        


            PMC_ERR2_STATUS
        


            PSM_ERR1_STATUS
        


            PSM_ERR2_STATUS
        

R

Raw status:
0: Deasserted
1: Asserted

Masks


            PMC_ERR_OUT1_MASK
        


            PMC_ERR_OUT2_MASK
        


            PMC_POR1_MASK
        


            PMC_POR2_MASK
        


            PMC_IRQ1_MASK
        


            PMC_IRQ2_MASK
        


            PMC_SRST1_MASK
        


            PMC_SRST2_MASK
        


            PSM_CR_ERR1_MASK
        


            PSM_CR_ERR2_MASK
        


            PSM_NCR_ERR1_MASK
        


            PSM_NCR_ERR2_MASK
        


            PSM_IRQ1_MASK
        


            PSM_IRQ2_MASK
        

R

Mask:
0: Enabled
1: Masked

Enables


            PMC_ERR_OUT1_EN
        


            PMC_ERR_OUT2_EN
        


            PMC_POR1_EN
        


            PMC_POR2_EN
        


            PMC_IRQ1_EN
        


            PMC_IRQ2_EN
        


            PMC_SRST1_EN
        


            PMC_SRST2_EN
        


            PSM_CR_ERR1_EN
        


            PSM_CR_ERR2_EN
        


            PSM_NCR_ERR1_EN
        


            PSM_NCR_ERR2_EN
        


            PSM_IRQ1_EN
        


            PSM_IRQ2_EN
        

R Enable:

0: Ignored

1: Enable error (IMR is set to 0)

Disables


            PMC_ERR_OUT1_DIS
        


            PMC_ERR_OUT2_DIS
        


            PMC_POR1_DIS
        


            PMC_POR2_DIS
        


            PMC_IRQ1_DIS
        


            PMC_IRQ2_DIS
        


            PMC_SRST1_DIS
        


            PMC_SRST2_DIS
        


            PSM_CR_ERR1_DIS
        


            PSM_CR_ERR2_DIS
        


            PSM_NCR_ERR1_DIS
        


            PSM_NCR_ERR2_DIS
        


            PSM_IRQ1_DIS
        


            PSM_IRQ2_DIS
        

R

Disable:
0: Ignored
1: Disable error (IMR is set to 1)