System Interrupts

Versal ACAP Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2022-04-26
Revision
1.4 English

Each controller generates two system interrupts. The IRQ numbers refer to controllers 0 and 1, respectively.

  • Wake-up interrupt (IRQ# 158 and 160)
  • Controller interrupt managed by three sets of register controls (IRQ# 159 and 161)

The enabled controller interrupts are OR'd together and assert the SD/eMMCx system interrupt. The wake-up interrupt is separate from the controller interrupts. All system interrupts are listed in IRQ System Interrupts.