System Management IDs

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

The following table lists the system management IDs (SMIDs).

Table 1. PMC and PS System Management IDs
Host Name SMID [9:0] Notes and Configuration Registers
PMC
RCU processor 10_0100_0110 Runs RCU BootROM code
PPU processor 10_0100_0111 Runs PLM firmware
JTAG DAP 10_0100_0000 Debug access port controller
PMC SYSMON 10_0100_0001 System voltage and temperature monitor

SD_eMMC0
SD_eMMC1

10_0100_0010 10_0100_0011 SD/eMMC v4.51 controllers
QSPI 10_0100_0100 Quad SPI flash memory controller
OSPI 10_0100_0101 Octal SPI flash memory controller

PMC DMA0
PMC DMA1

10_0100_1000
10_0100_1011

PMC DMA controller
DPC 10_0100_1001 Debug packet controller
LPD
RPU0 processor 10_0000_00xx Real-time processing unit; see RPU0_SMID_CFG register
RPU1 processor 10_0000_01xx Real-time processing unit; see RPU1_SMID_CFG register
LPD_DMA

CH 0
CH 1
CH 2
CH 3
CH 4
CH 5
CH 6
CH 7

10_0001_000x
10_0001_001x
10_0001_010x
10_0001_011x
10_0001_100x
10_0001_101x
10_0001_110x
10_0001_111x

LPD_DMA_SMID_CFG register
USB controller 10_0011_000x USB 2.0 USB_SMID register

GEM0
GEM1

10_0011_0100
10_0011_0101

Gigabit Ethernet MAC controllers
PSM processor 10_0011_1000 PS manager processor
DPC DMA 10_0011_1001 Debug packet controller DMA unit
FPD
APU processor 10_0110_xxxx

Application processing unit; bits [3:0] are determined by AXI_ID, see Table 1

APU GIC 10_0111_0010 Interrupt controller
FPU SMMU 10_0111_0100 FPD system memory management unit
FPD CCI 00_0000_0000 FPD cache coherent interconnect
CoreSight Debug 10_0111_0011 CoreSight