TrustZone Control

Versal ACAP Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2022-04-26
Revision
1.4 English

The persistent TrustZone control registers are summarized in the following table.

Table 1. Persistent TrustZone Control Registers
Register Offset Address Reset Type Description
PMC_IOP_SLCR_SECURE TrustZone Control Registers


            IOP_AXI_WPRTCN_SD0
        


            IOP_AXI_RPRTCN_SD0
        


            IOP_AXI_WPRTCN_SD1
        


            IOP_AXI_RPRTCN_SD1
        

0x0000
0x0004
0x0010
0x0014

POR

DMA transaction security settings:
SD_eMMC0 AXI write, AXI read
SD_eMMC1 AXI write, AXI read


            IOP_AXI_WPRTCN_QSPI
        


            IOP_AXI_WPRTCN_OSPI
        

0x0020
0x0030

POR

Flash DMA transaction security settings:
QSPI AXI write, OSPI AXI write

TZProt 0x006C POR Write protection control for PMC_IOP_SLCR_SECURE TrustZone registers
LPD_SLCR_SECURE TrustZone Control Registers


            RPU0_TZ
        


            RPU1_TZ
        


            PL_AXI_LPD_TZ
        


            PSM_TZ
        


            DMA_Ch0_TZ
        
(x8 Ch0 to Ch7)

0x0020
0x0024
0x0050
0x0054
0x0060+

POR

Miscellaneous host transaction security settings:
RPU0, RPU1 processors
PS_AXI_LPD interface
PSM subsystem
LPD DMA controller

DPC_TZ 0x004C POR

DPC transaction and register access security settings (APB, DMA, Aurora)


            XMPU_TZ
        


            XPPU_TZ
        


            CPM_CSR_TZ
        


            IPI_TZ
        


            CRL_TZ
        


            SLCR_INT_TZ
        

0x0028 0x002C 0x0038 0x0040 0x0044 0x0048 POR

Register access security settings for LPD programming interfaces

TZProt 0x0080 POR Write protection control for LPD_SLCR_SECURE TrustZone registers
LPD_IOP_SLCR_SECURE TrustZone Control Registers


            IOP_AXI_WPRTCN_GEM0
        


            IOP_AXI_RPRTCN_GEM0
        


            IOP_AXI_WPRTCN_GEM1
        


            IOP_AXI_RPRTCN_GEM1
        

0x0000
0x0004
0x0010
0x0014

POR

DMA transaction security settings:
GEM0 AXI write, AXI read
GEM1 AXI write, AXI read

IOP_AXI_USB_2 0x0020 POR USB transaction security setting
TZProt 0x007C POR Write protection control for LPD_IOP_SLCR_SECURE TrustZone registers
FPD_SLCR_SECURE TrustZone Control Registers


            APU_DUAL_TZ
        


            FPD_XMPU_TZ
        


            FPD_SLCR_TZ
        


            CRF_TZ
        


            PL_AXI_FPD_TZ
        


            PL_ACELITE_FPD_TZ
        


            FPD_CCI_TZ
        


            FPD_SMMU_TZ
        

0x0104
0x0108
0x010C
0x0110
0x0114
0x0118
0x011C
0x0120

 

Register access security settings for LPD programming interfaces

WProt 0x0FF8   Write protection control for FPD_SLCR_SECURE TrustZone registers