UART Registers

Versal ACAP Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2022-04-26
Revision
1.4 English

The UART controller core registers are listed in the following table. The base address for each UART register module:

  • UART0: 0xFF00_0000
  • UART1: 0xFF01_0000
Table 1. UART Controller Registers
Register Name Offset Address Type Description
Data Ports
DATA 0x000 RW Read/write data port
Miscellaneous Control
CTRL 0x030 RW Configuration and control


            BAUD_INTEGER
        


            BAUD_FRACT
        

0x024
0x028

RW BAUD rate integer and fractional divider
LINE_CTRL 0x02C RW Line control
IR_LOWPWR 0x020 RW Low power counter divisor
Status/Clear and Flags


            ERR_STAT_CLR
        


            FLAG
        

0x004
0x018

RW
R

Interface flags
Interrupts


            INTR_IMSC
        


            INTR_RIS
        


            INTR_MIS
        


            INTR_CLR
        

0x038
0x03C
0x040
0x044

RW
R
R
W

Read/write interrupt mask
Raw interrupt status
Masked interrupt status
Clear interrupt status

FIFO Interrupt Levels


            FIFO_LEVEL
        

0x034 RW RX and TX FIFO interrupt trigger levels