APB_IMR (CPM4_CRX) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

APB_IMR (CPM4_CRX) Register Description

Register NameAPB_IMR
Relative Address0x0000000008
Absolute Address 0x00FCA00008 (CPM4_CRX)
Width32
TyperoRead-only
Reset Value0x00000001
DescriptionInterrupt Mask

Read-only: 0: interrupt not masked (enabled) 1: interrupt masked (disabled) Clear a mask bit by writing to the IER register. Set a mask bit by writing to the IDR register. Alternate register name: IR_MASK

APB_IMR (CPM4_CRX) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:1roRead-only0x0Reserved
addr_decode_err 0roRead-only0x1Mask for an address decode error interrupt.