APER_SIZE0_LOW (CPM4_ADDRREMAP) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

APER_SIZE0_LOW (CPM4_ADDRREMAP) Register Description

Register NameAPER_SIZE0_LOW
Relative Address0x0000000030
Absolute Address 0x00FCF30030 (CPM4_ADDRREMAP)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionAperture 0 - Size - Bits[31:0]
These registers are programmed by tools for use with CCIX options and are then re-programmed by CCIX-DVSEC FW to setup CCIX SAM to local address
remap. User should not change the values in this register space.

APER_SIZE0_LOW (CPM4_ADDRREMAP) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
field_reserved31:16rwNormal read/write0x0field_reserved
size_low15:0rwNormal read/write0x0This field indicates the 16 LSB bit encodings for the Pool Size supported by Memory Pool 0. The Total Pool Size Capability, in integer multiples of 64KB, is indicated by the combination of the Lower and Upper Bits of the Memory Pool Size Capability field or [MemPoolSizeCapHi, MemPoolSizeCapLo]
[MemPoolSizeCapHi,MemPoolSizeCapLo]: Size Capability.
Examples:
[00000000h, 0000h]: 64K Pool Size Capability.
[00000000h, 05FFh]: 96MB Pool Size Capability.
[00000000h, FFFFh]: 4GB Pool Size Capability.
[00000001h, 7FFFh]: 6GB Pool Size Capability.