APU_GIC_A72_CPUIF Module

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

APU_GIC_A72_CPUIF Module Description

Module NameAPU_GIC_A72_CPUIF Module
Modules of this TypeAPU_GIC_CPUIF
Base Address0x00F9040000 (APU_GIC_CPUIF)
DescriptionAPU GIC CPU Interface

APU_GIC_A72_CPUIF Module Register Summary

Register NameAddressWidthTypeReset ValueDescription
GICC_CTLR0x000000000032rwNormal read/write0x00000000GICC_CTLR
GICC_PMR0x000000000432rwNormal read/write0x00000000GICC_PMR
GICC_BPR0x000000000832rwNormal read/write0x00000002GICC_BPR
GICC_IAR0x000000000C32mixedMixed types. See bit-field details.0x000003FFGICC_IAR
GICC_EOIR0x000000001032woWrite-only0x00000000GICC_EOIR
GICC_RPR0x000000001432roRead-only0x000000FFGICC_RPR
GICC_HPPIR0x000000001832rwNormal read/write0x000003FFGICC_HPPIR
GICC_ABPR0x000000001C32rwNormal read/write0x00000003GICC_ABPR
GICC_AIAR0x000000002032rwNormal read/write0x000003FFGICC_AIAR
GICC_AEOIR0x000000002432rwNormal read/write0x00000000GICC_AEOIR
GICC_AHPPIR0x000000002832rwNormal read/write0x000003FFGICC_AHPPIR
GICC_APR00x00000000D032rwNormal read/write0x00000000GICC_APR0
GICC_NSAPR00x00000000E032rwNormal read/write0x00000000GICC_NSAPR0
GICC_IIDR0x00000000FC32roRead-only0x00000000GICC_IIDR
GICC_DIR0x000000100032woWrite-only0x00000000GICC_DIR