AXI_slv_brdg_Base_Addr_L (CPM4_DMA_ATTR) Register Description
| Register Name | AXI_slv_brdg_Base_Addr_L |
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| Relative Address | 0x00000000B0 |
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| Absolute Address |
0x00FCA700B0 (CPM4_DMA_ATTR)
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| Width | 32 |
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| Type | rwNormal read/write |
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| Reset Value | 0x00000000 |
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| Description | 256MB space - base determined by PS. This is base address of ECAM where 0x00 to 0xE00 offsets would be the config space window, and VSCE capability starts from 0xE00 followed by bridge registers |
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This register should only be written to during reset of the PCIe block Alternate register name: attr_dma_axi_slv_brdg_base_addr_l
AXI_slv_brdg_Base_Addr_L (CPM4_DMA_ATTR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
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| attr | 31:0 | rwNormal read/write | 0x0 | 256MB space - base determined by PS. This is base address of ECAM where 0x00 to 0xE00 offsets would be the config space window, and VSCE capability starts from 0xE00 followed by bridge registers |