ArbPhase_BaudRate (CANFD) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

ArbPhase_BaudRate (CANFD) Register Description

Register NameArbPhase_BaudRate
Relative Address0x0000000008
Absolute Address 0x00FF060008 (CANFD0)
0x00FF070008 (CANFD1)
Width 8
TyperwNormal read/write
Reset Value0x00000000
DescriptionArbitration Phase Baud Rate Prescaler

The quantum clock output is needed for sampling and synchronization. Software Driver name: XCANFD_BRPR Alternate register name: Arbitration_Phase_Baud_Rate_Prescaler_Register

ArbPhase_BaudRate (CANFD) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
BRP 7:0rwNormal read/write0x0Arbitration-phase Baud Rate Prescaler
The [BRP] values of 0 to 255 coorespond to clock divider values of 1 to 256.
Note: These bits can be written only when SW_Reset [CEN] bit = 0.