Register Name | Address | Width | Type | Reset Value | Description |
CFU_ISR | 0x0000000000 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Interrupt Status Register for intrN. This is a sticky register that holds the value of the interrupt until cleared by a value of 1. |
CFU_IMR | 0x0000000004 | 32 | mixedMixed types. See bit-field details. | 0x000003FF | Interrupt Mask Register for intrN. This is a read-only location and can be atomically altered by either the IDR or the IER. HW reset always default to 1. (erg script ignores reset_value column) |
CFU_IER | 0x0000000008 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Interrupt Enable Register. A write of to this location will unmask the interrupt. (IMR: 0) |
CFU_IDR | 0x000000000C | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Interrupt Disable Register. A write of one to this location will mask the interrupt. (IMR: 1) |
CFU_ITR | 0x0000000010 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Interrupt Trigger Register. A write of one to this location will the interrupt. (mainly for testing) |
CFU_PROTECT | 0x0000000014 | 1 | rwNormal read/write | 0x00000001 | CFU write protect register |
CFU_FGCR | 0x0000000018 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Fabric global signal register. |
CFU_CTL | 0x000000001C | 32 | mixedMixed types. See bit-field details. | 0x00000000 | CFU Control Register, requires CFU_MASK |
CFU_MASK | 0x0000000028 | 32 | rwNormal read/write | 0x00000000 | CFU register bit level masking (Apply to CFU_CTL and CFU_FGCR only) |
CFU_CRC_EXPECT | 0x000000002C | 32 | rwNormal read/write | 0x00000000 | Expected CRC32 for CFI segment of DPI/bitstream. |
CFU_CFRAME_LEFT_T0 | 0x0000000060 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Type-0 frame number to the left of cframe |
CFU_CFRAME_LEFT_T1 | 0x0000000064 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Type-1 frame number to the left of cframe |
CFU_CFRAME_LEFT_T2 | 0x0000000068 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Type-2 frame number to the left of cframe |
CFU_ROW_RANGE | 0x000000006C | 32 | mixedMixed types. See bit-field details. | 0x00000000 | Number of CFrame rows in the device |
CFU_STATUS | 0x0000000100 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | ATB Sideband Signals |
CFU_QWORD_CNT | 0x0000000108 | 32 | roRead-only | 0x00000000 | number of AXI qwords received from AXI stream port for debugging |
CFU_CRC_LIVE | 0x000000010C | 32 | roRead-only | 0x00000000 | accumulated CRC from stream port. |
CFU_PENDING_READ_CNT | 0x0000000110 | 32 | mixedMixed types. See bit-field details. | 0x00000000 | frame read qword count |
CFU_FDRI_CNT | 0x0000000114 | 32 | roRead-only | 0x00000000 | FDRI_CNT value |