CFU_IMR (CFU_CSR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

CFU_IMR (CFU_CSR) Register Description

Register NameCFU_IMR
Relative Address0x0000000004
Absolute Address 0x00F12B0004 (CFU_CSR)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x000003FF
DescriptionInterrupt Mask Register for intrN. This is a read-only location and can be atomically altered by either the IDR or the IER. HW reset always default to 1. (erg script ignores reset_value column)

CFU_IMR (CFU_CSR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:10razRead as zero0x0reserved for future use
usr_gts_event 9roRead-only0x1IMR for fabric GTS event. GTS tri-state all PL HDIO
usr_gsr_event 8roRead-only0x1IMR for fabric GSR event. GSR clear entire fabric user visible state
slverr 7roRead-only0x1IMR for APB slverr. (out of range address)
IOP_PAR 6roRead-only0x1IMR for decompression errors. At decompress rising edge, CFU AXI wfifo is not empty. While decompress=1, there is unexpected AXI read or none-stream AXI write, at decompress falling edge, there is residue inside decompression engine.
Note: Field name reference: decomp_error
bad_cfi_packet 5roRead-only0x1IMR for bad CFI packet from stream keyhole aperture, or r/w to reserved space, or write to FDRO space, or read to SFR space, or read to stream space, read CFRAME reg in the middle of FDRI, or none-stream and none-FDRI access in the middle of FDRI.
axi_align_error 4roRead-only0x1IMR for axi alignment error (x32 expect word addr 0, 1, 2, 3.
x64 expect dword address 0, 1)
cfi_row_error 3roRead-only0x1IMR for accessing out of range row
crc32_error 2roRead-only0x1IMR for bitstream crc32 error
crc8_error 1roRead-only0x1IMR for bitstream packet header crc8 error
seu_endofcalib 0roRead-only0x1IMR for seu_endofcalib. This is AND of all cframe seu_endofcalib, may used by Safety