CPLL_CFG (CPM4_CRX) Register

Versal Adaptive SoC Register Reference (AM012)
Document ID
AM012
Release Date
2023-08-29
Revision
1.3

CPLL_CFG (CPM4_CRX) Register Description

Register NameCPLL_CFG
Relative Address0x0000000044
Absolute Address 0x00FCA00044 (CPM4_CRX)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x02000000
DescriptionHelper data. Values are to be looked up in a table from Data Sheet based on FBDIV value

CPLL_CFG (CPM4_CRX) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
LOCK_DLY31:25rwNormal read/write0x1Lock circuit configuration settings for lock windowsize
Reserved24:23roRead-only0x0reserved
LOCK_CNT22:13rwNormal read/write0x0Lock circuit counter setting
Reserved12roRead-only0x0reserved
LFHF11:10rwNormal read/write0x0PLL loop filter high frequency capacitor control
Reserved 9roRead-only0x0reserved
CP 8:5rwNormal read/write0x0PLL charge pump control
Reserved 4roRead-only0x0reserved
RES 3:0rwNormal read/write0x0PLL loop filter resistor control