CPM4_CMN600 Module

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

CPM4_CMN600 Module Description

Module NameCPM4_CMN600 Module
Modules of this TypeCPM4_CMN
Base Address0x00FC000000 (CPM4_CMN)
DescriptionCPM4 CMN Registers

CPM4_CMN600 Module Register Summary

Register NameAddressWidthTypeReset ValueDescription
por_mxp_node_info_u_smxp_0_00x000000800064mixedMixed types. See bit-field details.0x00000006Provides component identification information.
por_mxp_device_port_connect_info_p0_u_smxp_0_00x000000800864mixedMixed types. See bit-field details.0x00000001Contains device port connection information for port 0.
por_mxp_device_port_connect_info_p1_u_smxp_0_00x000000801064mixedMixed types. See bit-field details.0x00000000Contains device port connection information for port 1.
por_mxp_mesh_port_connect_info_east_u_smxp_0_00x000000801864mixedMixed types. See bit-field details.0x00000000Contains port connection information for East port.
por_mxp_mesh_port_connect_info_north_u_smxp_0_00x000000802064mixedMixed types. See bit-field details.0x00000000Contains port connection information for North port.
por_mxp_child_info_u_smxp_0_00x000000808064mixedMixed types. See bit-field details.0x01000002Provides component child identification information.
por_mxp_child_pointer_0_u_smxp_0_00x000000810064mixedMixed types. See bit-field details.0x00020000Contains base address of the configuration slave for child 0.
por_mxp_child_pointer_1_u_smxp_0_00x000000810864mixedMixed types. See bit-field details.0x00010000Contains base address of the configuration slave for child 1.
por_mxp_child_pointer_2_u_smxp_0_00x000000811064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 2.
por_mxp_child_pointer_3_u_smxp_0_00x000000811864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 3.
por_mxp_child_pointer_4_u_smxp_0_00x000000812064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 4.
por_mxp_child_pointer_5_u_smxp_0_00x000000812864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 5.
por_mxp_child_pointer_6_u_smxp_0_00x000000813064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 6.
por_mxp_child_pointer_7_u_smxp_0_00x000000813864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 7.
por_mxp_child_pointer_8_u_smxp_0_00x000000814064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 8.
por_mxp_child_pointer_9_u_smxp_0_00x000000814864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 9.
por_mxp_child_pointer_10_u_smxp_0_00x000000815064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 10.
por_mxp_child_pointer_11_u_smxp_0_00x000000815864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 11.
por_mxp_child_pointer_12_u_smxp_0_00x000000816064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 12.
por_mxp_child_pointer_13_u_smxp_0_00x000000816864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 13.
por_mxp_child_pointer_14_u_smxp_0_00x000000817064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 14.
por_mxp_child_pointer_15_u_smxp_0_00x000000817864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 15.
por_mxp_p0_info_u_smxp_0_00x000000890064mixedMixed types. See bit-field details.0x00000211Provides component identification information for XP port 0.
por_mxp_p1_info_u_smxp_0_00x000000890864mixedMixed types. See bit-field details.0x00000210Provides component identification information for XP port 1.
por_mxp_secure_register_groups_override_u_smxp_0_00x000000898064mixedMixed types. See bit-field details.0x00000000Allows non-secure access to predefined groups of secure registers.
por_mxp_aux_ctl_u_smxp_0_00x0000008A0064mixedMixed types. See bit-field details.0x00000000Functions as the auxiliary control register for XP.
por_mxp_p0_qos_control_u_smxp_0_00x0000008A8064mixedMixed types. See bit-field details.0x00000000Controls QoS settings for devices connected to port 0.
por_mxp_p0_qos_lat_tgt_u_smxp_0_00x0000008A8864mixedMixed types. See bit-field details.0x00000000Controls QoS target latency/period (in cycles) for regulation of devices connected to port 0.
por_mxp_p0_qos_lat_scale_u_smxp_0_00x0000008A9064mixedMixed types. See bit-field details.0x00000000Controls the QoS target scale factor for devices connected to port 0. The scale factor is represented in powers of two from the range 2^(-3) to 2^(-10).
por_mxp_p0_qos_lat_range_u_smxp_0_00x0000008A9864mixedMixed types. See bit-field details.0x00000000Controls the minimum and maximum QoS values generated by the QoS regulator for devices connected to port 0.
por_mxp_p1_qos_control_u_smxp_0_00x0000008AA064mixedMixed types. See bit-field details.0x00000000Controls QoS settings for devices connected to port 1.
por_mxp_p1_qos_lat_tgt_u_smxp_0_00x0000008AA864mixedMixed types. See bit-field details.0x00000000Controls QoS target latency/period (in cycles) for regulation of devices connected to port 1.
por_mxp_p1_qos_lat_scale_u_smxp_0_00x0000008AB064mixedMixed types. See bit-field details.0x00000000Controls the QoS target scale factor for devices connected to port 1. The scale factor is represented in powers of two from the range 2^(-3) to 2^(-10).
por_mxp_p1_qos_lat_range_u_smxp_0_00x0000008AB864mixedMixed types. See bit-field details.0x00000000Controls the minimum and maximum QoS values generated by the QoS regulator for devices connected to port 1.
por_mxp_p0_syscoreq_ctl_u_smxp_0_00x000000900064mixedMixed types. See bit-field details.0x00000000Functions as the port 0 snoop and DVM domain control register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p0_syscoack_status. NOTE: Only valid on RN-F ports.
por_mxp_p1_syscoreq_ctl_u_smxp_0_00x000000900864mixedMixed types. See bit-field details.0x00000000Functions as the port 1 snoop and DVM domain control register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p1_syscoack_status. NOTE: Only valid on RN-F ports.
por_mxp_p0_syscoack_status_u_smxp_0_00x000000901064mixedMixed types. See bit-field details.0x00000000Functions as the port 0 snoop and DVM domain status register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p0_syscoreq_ctl. NOTE: Only valid on RN-F ports.
por_mxp_p1_syscoack_status_u_smxp_0_00x000000901864mixedMixed types. See bit-field details.0x00000000Functions as the port 1 snoop and DVM domain status register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p1_syscoreq_ctl. NOTE: Only valid on RN-F ports.
por_mxp_pmu_event_sel_u_smxp_0_00x000000A00064mixedMixed types. See bit-field details.0x00000000Specifies the PMU event to be counted.
por_dtm_control_u_smxp_0_00x000000A10064mixedMixed types. See bit-field details.0x00000000Functions as the DTM control register.
por_dtm_fifo_entry_ready_u_smxp_0_00x000000A11864mixedMixed types. See bit-field details.0x00000000Controls status of DTM FIFO entries.
por_dtm_fifo_entry0_0_u_smxp_0_00x000000A12064roRead-only0x00000000Contains DTM FIFO entry 0 data.
por_dtm_fifo_entry0_1_u_smxp_0_00x000000A12864roRead-only0x00000000Contains DTM FIFO entry 0 data.
por_dtm_fifo_entry0_2_u_smxp_0_00x000000A13064mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 0 data.
por_dtm_fifo_entry1_0_u_smxp_0_00x000000A13864roRead-only0x00000000Contains DTM FIFO entry 1 data.
por_dtm_fifo_entry1_1_u_smxp_0_00x000000A14064roRead-only0x00000000Contains DTM FIFO entry 1 data.
por_dtm_fifo_entry1_2_u_smxp_0_00x000000A14864mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 1 data.
por_dtm_fifo_entry2_0_u_smxp_0_00x000000A15064roRead-only0x00000000Contains DTM FIFO entry 2 data.
por_dtm_fifo_entry2_1_u_smxp_0_00x000000A15864roRead-only0x00000000Contains DTM FIFO entry 2 data.
por_dtm_fifo_entry2_2_u_smxp_0_00x000000A16064mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 2 data.
por_dtm_fifo_entry3_0_u_smxp_0_00x000000A16864roRead-only0x00000000Contains DTM FIFO entry 3 data.
por_dtm_fifo_entry3_1_u_smxp_0_00x000000A17064roRead-only0x00000000Contains DTM FIFO entry 3 data.
por_dtm_fifo_entry3_2_u_smxp_0_00x000000A17864mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 3 data.
por_dtm_wp0_config_u_smxp_0_00x000000A1A064mixedMixed types. See bit-field details.0x00000000Configures watchpoint 0.
por_dtm_wp0_val_u_smxp_0_00x000000A1A864rwNormal read/write0x00000000Configures watchpoint 0 comparison value.
por_dtm_wp0_mask_u_smxp_0_00x000000A1B064rwNormal read/write0x00000000Configures watchpoint0 comparison mask.
por_dtm_wp1_config_u_smxp_0_00x000000A1B864mixedMixed types. See bit-field details.0x00000000Configures watchpoint 1.
por_dtm_wp1_val_u_smxp_0_00x000000A1C064rwNormal read/write0x00000000Configures watchpoint 1 comparison value.
por_dtm_wp1_mask_u_smxp_0_00x000000A1C864rwNormal read/write0x00000000Configures watchpoint 1 comparison mask.
por_dtm_wp2_config_u_smxp_0_00x000000A1D064mixedMixed types. See bit-field details.0x00000000Configures watchpoint 2.
por_dtm_wp2_val_u_smxp_0_00x000000A1D864rwNormal read/write0x00000000Configures watchpoint 2 comparison value.
por_dtm_wp2_mask_u_smxp_0_00x000000A1E064rwNormal read/write0x00000000Configures watchpoint 2 comparison mask.
por_dtm_wp3_config_u_smxp_0_00x000000A1E864mixedMixed types. See bit-field details.0x00000000Configures watchpoint 3.
por_dtm_wp3_val_u_smxp_0_00x000000A1F064rwNormal read/write0x00000000Configures watchpoint 3 comparison value.
por_dtm_wp3_mask_u_smxp_0_00x000000A1F864rwNormal read/write0x00000000Configures watchpoint 3 comparison mask.
por_dtm_pmsicr_u_smxp_0_00x000000A20064mixedMixed types. See bit-field details.0x00000000Functions as the sampling interval counter register.
por_dtm_pmsirr_u_smxp_0_00x000000A20864mixedMixed types. See bit-field details.0x00000000Functions as the sampling interval reload register.
por_dtm_pmu_config_u_smxp_0_00x000000A21064mixedMixed types. See bit-field details.0x00000000Configures the DTM PMU.
por_dtm_pmevcnt_u_smxp_0_00x000000A22064rwNormal read/write0x00000000Contains all PMU event counters (0, 1, 2, 3).
por_dtm_pmevcntsr_u_smxp_0_00x000000A24064rwNormal read/write0x00000000Functions as the PMU event counter shadow register for all counters (0, 1, 2, 3).
por_mxp_errfr_u_smxp_0_00x000000B00064mixedMixed types. See bit-field details.0x000000A1Functions as the error feature register.
por_mxp_errctlr_u_smxp_0_00x000000B00864mixedMixed types. See bit-field details.0x00000000Functions as the error control register. Controls whether specific error-handling interrupts and error detection/deferment are enabled.
por_mxp_errstatus_u_smxp_0_00x000000B01064mixedMixed types. See bit-field details.0x00000000Functions as the error status register. AV and MV bits must be cleared in the same cycle, otherwise the error record does not have a consistent view.
por_mxp_errmisc_u_smxp_0_00x000000B02864mixedMixed types. See bit-field details.0x00000000Functions as the miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors.
por_mxp_errfr_NS_u_smxp_0_00x000000B10064mixedMixed types. See bit-field details.0x000000A1Functions as the non-secure error feature register.
por_mxp_errctlr_NS_u_smxp_0_00x000000B10864mixedMixed types. See bit-field details.0x00000000Functions as the non-secure error control register. Controls whether specific error-handling interrupts and error detection/deferment are enabled.
por_mxp_errstatus_NS_u_smxp_0_00x000000B11064mixedMixed types. See bit-field details.0x00000000Functions as the non-secure error status register.
por_mxp_errmisc_NS_u_smxp_0_00x000000B12864mixedMixed types. See bit-field details.0x00000000Functions as the non-secure miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors.
por_rni_node_info_u_rni_nid00x000001000064mixedMixed types. See bit-field details.0x0000000AProvides component identification information.
por_rni_child_info_u_rni_nid00x000001008064mixedMixed types. See bit-field details.0x00000000Provides component child identification information.
por_rni_unit_info_u_rni_nid00x000001090064mixedMixed types. See bit-field details.0x08040404Provides component identification information for RN-I.
por_rni_secure_register_groups_override_u_rni_nid00x000001098064mixedMixed types. See bit-field details.0x00000000Allows non-secure access to predefined groups of secure registers.
por_rni_cfg_ctl_u_rni_nid00x0000010A0064mixedMixed types. See bit-field details.0x04041401Functions as the configuration control register. Specifies the current mode.
por_rni_aux_ctl_u_rni_nid00x0000010A0864mixedMixed types. See bit-field details.0x00000002Functions as the auxiliary control register for RN-I.
por_rni_s0_port_control_u_rni_nid00x0000010A1064mixedMixed types. See bit-field details.0x00000000Controls port S0 AXI/ACE slave interface settings.
por_rni_s1_port_control_u_rni_nid00x0000010A1864mixedMixed types. See bit-field details.0x00000000Controls port S1 AXI/ACE slave interface settings.
por_rni_s2_port_control_u_rni_nid00x0000010A2064mixedMixed types. See bit-field details.0x00000000Controls port S2 AXI/ACE slave interface settings.
por_rni_s0_qos_control_u_rni_nid00x0000010A8064mixedMixed types. See bit-field details.0x00000000Controls QoS settings for port S0 AXI/ACE slave interface.
por_rni_s0_qos_lat_tgt_u_rni_nid00x0000010A8864mixedMixed types. See bit-field details.0x00000000Controls QoS target latency (in cycles) for regulations of port S0 read and write transactions.
por_rni_s0_qos_lat_scale_u_rni_nid00x0000010A9064mixedMixed types. See bit-field details.0x00000000Controls the QoS target latency scale factor for port S0 read and write transactions. This register represents powers of two from the range 2^(-5) to 2^(-12); it is used to match a 16-bit integrator.
por_rni_s0_qos_lat_range_u_rni_nid00x0000010A9864mixedMixed types. See bit-field details.0x00000000Controls the minimum and maximum QoS values generated by the QoS latency regulator for port S0 read and write transactions.
por_rni_s1_qos_control_u_rni_nid00x0000010AA064mixedMixed types. See bit-field details.0x00000000Controls QoS settings for port S1 AXI/ACE slave interface.
por_rni_s1_qos_lat_tgt_u_rni_nid00x0000010AA864mixedMixed types. See bit-field details.0x00000000Controls QoS target latency (in cycles) for regulation of port S1 read and write transactions.
por_rni_s1_qos_lat_scale_u_rni_nid00x0000010AB064mixedMixed types. See bit-field details.0x00000000Controls the QoS target latency scale factor for port S1 read and write transactions. This register represents powers of two from the range 2^(-5) to 2^(-12); it is used to match a 16-bit integrator.
por_rni_s1_qos_lat_range_u_rni_nid00x0000010AB864mixedMixed types. See bit-field details.0x00000000Controls the minimum and maximum QoS values generated by the QoS latency regulator for port S1 read and write transactions.
por_rni_s2_qos_control_u_rni_nid00x0000010AC064mixedMixed types. See bit-field details.0x00000000Controls QoS settings for port S2 AXI/ACE slave interface.
por_rni_s2_qos_lat_tgt_u_rni_nid00x0000010AC864mixedMixed types. See bit-field details.0x00000000Controls QoS target latency (in cycles) for regulation of port S2 read and write transactions.
por_rni_s2_qos_lat_scale_u_rni_nid00x0000010AD064mixedMixed types. See bit-field details.0x00000000Controls the QoS target latency scale factor for port S2 read and write transactions. This register represents powers of two from the range 2^(-5) to 2^(-12); it is used to match a 16-bit integrator.
por_rni_s2_qos_lat_range_u_rni_nid00x0000010AD864mixedMixed types. See bit-field details.0x00000000Controls the minimum and maximum QoS values generated by the QoS latency regulator for port S2 read and write transactions.
por_rni_pmu_event_sel_u_rni_nid00x000001200064mixedMixed types. See bit-field details.0x00000000Specifies the PMU event to be counted.
por_rnsam_node_info_u_rni_nid00x000002000064mixedMixed types. See bit-field details.0x0000000FProvides component identification information.
por_rnsam_child_info_u_rni_nid00x000002008064mixedMixed types. See bit-field details.0x00000000Provides component child identification information.
por_rnsam_unit_info_u_rni_nid00x000002090064mixedMixed types. See bit-field details.0x800040004Provides component identification information for RN SAM.
por_rnsam_secure_register_groups_override_u_rni_nid00x000002098064mixedMixed types. See bit-field details.0x00000000Allows non-secure access to predefined groups of secure registers.
rnsam_status_u_rni_nid00x0000020C0064mixedMixed types. See bit-field details.0x00000001Functions as the default and programming mode status register.
non_hash_mem_region_reg0_u_rni_nid00x0000020C0864mixedMixed types. See bit-field details.0x00000000Configures non-hashed memory regions 0 and 1.
non_hash_mem_region_reg1_u_rni_nid00x0000020C1064mixedMixed types. See bit-field details.0x00000000Configures non-hashed memory regions 2 and 3.
non_hash_mem_region_reg2_u_rni_nid00x0000020C1864mixedMixed types. See bit-field details.0x00000000Configures non-hashed memory regions 4 and 5.
non_hash_mem_region_reg3_u_rni_nid00x0000020C2064mixedMixed types. See bit-field details.0x00000000Configures non-hashed memory regions 6 and 7.
non_hash_tgt_nodeid0_u_rni_nid00x0000020C3064mixedMixed types. See bit-field details.0x00000000Configures non-hashed target node IDs 0 to 3.
non_hash_tgt_nodeid1_u_rni_nid00x0000020C3864mixedMixed types. See bit-field details.0x00000000Configures non-hashed target node IDs 4 to 7.
sys_cache_grp_region0_u_rni_nid00x0000020C4864mixedMixed types. See bit-field details.0x00000000Configures hashed memory regions 0 and 1.
sys_cache_grp_region1_u_rni_nid00x0000020C5064mixedMixed types. See bit-field details.0x00000000Configures hashed memory regions 2 and 3.
sys_cache_grp_hn_nodeid_reg0_u_rni_nid00x0000020C5864mixedMixed types. See bit-field details.0x00000000Configures hashed node IDs for system cache groups. Controls target HN node IDs 0 to 3.
sys_cache_grp_hn_nodeid_reg2_u_rni_nid00x0000020C6864mixedMixed types. See bit-field details.0x00000000Configures hashed node IDs for system cache groups. Controls target HN node IDs 8 to 11.
sys_cache_grp_hn_nodeid_reg4_u_rni_nid00x0000020C7864mixedMixed types. See bit-field details.0x00000000Configures hashed node IDs for system cache groups. Controls target HN node IDs 16 to 19.
sys_cache_grp_hn_nodeid_reg6_u_rni_nid00x0000020C8864mixedMixed types. See bit-field details.0x00000000Configures hashed node IDs for system cache groups. Controls target HN node IDs 24 to 27.
sys_cache_grp_nonhash_nodeid_u_rni_nid00x0000020C9864mixedMixed types. See bit-field details.0x00000000Configures non-hashed node IDs for system cache groups 1 to 3. NOTE: Only applicable in the non-hashed mode.
sys_cache_group_hn_count_u_rni_nid00x0000020D0064mixedMixed types. See bit-field details.0x00000000Indicates number of HN-Fs in system cache groups 0 to 3.
gic_mem_region_reg_u_rni_nid00x0000020D5864mixedMixed types. See bit-field details.0x00000000Configures GIC memory region.
cml_port_aggr_mode_ctrl_reg_u_rni_nid00x0000020E0064mixedMixed types. See bit-field details.0x00000000Configures the CCIX port aggregation modes for all non-hashed memory regions.
cml_port_aggr_grp0_add_mask_u_rni_nid00x0000020E0864mixedMixed types. See bit-field details.0x00000040Configures the CCIX port aggregation address mask for group 0.
cml_port_aggr_grp1_add_mask_u_rni_nid00x0000020E1064mixedMixed types. See bit-field details.0x00000040Configures the CCIX port aggregation address mask for group 1.
cml_port_aggr_grp0_reg_u_rni_nid00x0000020E4064mixedMixed types. See bit-field details.0x00000000Configures the CCIX port aggregation port IDs for group 0.
cml_port_aggr_grp1_reg_u_rni_nid00x0000020E4864mixedMixed types. See bit-field details.0x00000000Configures the CCIX port aggregation port IDs for group 1.
por_cfgm_node_info_u_hnd_nid80x000010000064mixedMixed types. See bit-field details.0x00080002Provides component identification information.
por_cfgm_periph_id_0_periph_id_1_u_hnd_nid80x000010000864mixedMixed types. See bit-field details.0xB400000034Functions as the peripheral ID 0 and peripheral ID 1 register.
por_cfgm_periph_id_2_periph_id_3_u_hnd_nid80x000010001064mixedMixed types. See bit-field details.0x0000004BFunctions as the peripheral ID 2 and peripheral ID 3 register.
por_cfgm_periph_id_4_periph_id_5_u_hnd_nid80x000010001864mixedMixed types. See bit-field details.0x000000C4Functions as the peripheral ID 4 and peripheral ID 5 register.
por_cfgm_periph_id_6_periph_id_7_u_hnd_nid80x000010002064mixedMixed types. See bit-field details.0x00000000Functions as the peripheral ID 6 and peripheral ID 7 register.
por_cfgm_component_id_0_component_id_1_u_hnd_nid80x000010002864mixedMixed types. See bit-field details.0xF00000000DFunctions as the component ID 0 and component ID 1 register.
por_cfgm_component_id_2_component_id_3_u_hnd_nid80x000010003064mixedMixed types. See bit-field details.0xB100000005Functions as the component ID 2 and component ID 3 register.
por_cfgm_child_info_u_hnd_nid80x000010008064mixedMixed types. See bit-field details.0x01000006Provides component child identification information.
por_cfgm_child_pointer_0_u_hnd_nid80x000010010064mixedMixed types. See bit-field details.0x00908000Contains base address of child configuration node. NOTE: There will be as many child pointer registers in the Global Config Unit as the number of XPs on the chip. Each successive child pointer register will be at the next 8 byte address boundary. Each successive child pointer register will be named with the suffix corresponding to the register number. For example por_cfgm_child_pointer_<number>
por_cfgm_child_pointer_1_u_hnd_nid80x000010010864mixedMixed types. See bit-field details.0x00808000Contains base address of child configuration node. NOTE: There will be as many child pointer registers in the Global Config Unit as the number of XPs on the chip. Each successive child pointer register will be at the next 8 byte address boundary. Each successive child pointer register will be named with the suffix corresponding to the register number. For example por_cfgm_child_pointer_<number>
por_cfgm_child_pointer_2_u_hnd_nid80x000010011064mixedMixed types. See bit-field details.0x00508000Contains base address of child configuration node. NOTE: There will be as many child pointer registers in the Global Config Unit as the number of XPs on the chip. Each successive child pointer register will be at the next 8 byte address boundary. Each successive child pointer register will be named with the suffix corresponding to the register number. For example por_cfgm_child_pointer_<number>
por_cfgm_child_pointer_3_u_hnd_nid80x000010011864mixedMixed types. See bit-field details.0x00408000Contains base address of child configuration node. NOTE: There will be as many child pointer registers in the Global Config Unit as the number of XPs on the chip. Each successive child pointer register will be at the next 8 byte address boundary. Each successive child pointer register will be named with the suffix corresponding to the register number. For example por_cfgm_child_pointer_<number>
por_cfgm_child_pointer_4_u_hnd_nid80x000010012064mixedMixed types. See bit-field details.0x00108000Contains base address of child configuration node. NOTE: There will be as many child pointer registers in the Global Config Unit as the number of XPs on the chip. Each successive child pointer register will be at the next 8 byte address boundary. Each successive child pointer register will be named with the suffix corresponding to the register number. For example por_cfgm_child_pointer_<number>
por_cfgm_child_pointer_5_u_hnd_nid80x000010012864mixedMixed types. See bit-field details.0x00008000Contains base address of child configuration node. NOTE: There will be as many child pointer registers in the Global Config Unit as the number of XPs on the chip. Each successive child pointer register will be at the next 8 byte address boundary. Each successive child pointer register will be named with the suffix corresponding to the register number. For example por_cfgm_child_pointer_<number>
por_info_global_u_hnd_nid80x000010090064mixedMixed types. See bit-field details.0x102303004Contains user-specified values of build-time global configuration parameters.
por_cfgm_secure_access_u_hnd_nid80x000010098064mixedMixed types. See bit-field details.0x00000000Functions as the secure access control register. This register must be set up at boot time. Before initiating a write to this register, software must ensure that no other configuration accesses are in flight. Once this write is initiated, no other configuration accesses are initiated until complete.
por_ppu_int_enable_u_hnd_nid80x000010100064rwNormal read/write0x00000000Configures the HN-F PPU event interrupt. Contains the interrupt mask.
por_ppu_int_status_u_hnd_nid80x000010100864wtcReadable, write a 1 to clear0x00000000Provides HN-F PPU event interrupt status.
por_ppu_qactive_hyst_u_hnd_nid80x000010101064mixedMixed types. See bit-field details.0x00000010Number of hysteresis clock cycles to retain QACTIVE assertion
por_cfgm_errgsr0_u_hnd_nid80x000010300064roRead-only0x00000000Provides the XP <n> secure error status.
por_cfgm_errgsr1_u_hnd_nid80x000010300864roRead-only0x00000000Provides the HN-I <n> secure error status.
por_cfgm_errgsr2_u_hnd_nid80x000010301064roRead-only0x00000000Provides the HN-F <n> secure error status.
por_cfgm_errgsr3_u_hnd_nid80x000010301864roRead-only0x00000000Provides the SBSX <n> secure error status.
por_cfgm_errgsr4_u_hnd_nid80x000010302064roRead-only0x00000000Provides the CXG <n> secure error status.
por_cfgm_errgsr5_u_hnd_nid80x000010308064roRead-only0x00000000Provides the XP <n> secure fault status.
por_cfgm_errgsr6_u_hnd_nid80x000010308864roRead-only0x00000000Provides the HN-I <n> secure fault status.
por_cfgm_errgsr7_u_hnd_nid80x000010309064roRead-only0x00000000Provides the HN-F <n> secure fault status.
por_cfgm_errgsr8_u_hnd_nid80x000010309864roRead-only0x00000000Provides the SBSX <n> secure fault status.
por_cfgm_errgsr9_u_hnd_nid80x00001030A064roRead-only0x00000000Provides the CXG <n> secure error status.
por_cfgm_errgsr0_NS_u_hnd_nid80x000010310064roRead-only0x00000000Provides the XP <n> non-secure error status.
por_cfgm_errgsr1_NS_u_hnd_nid80x000010310864roRead-only0x00000000Provides the HN-I <n> non-secure error status.
por_cfgm_errgsr2_NS_u_hnd_nid80x000010311064roRead-only0x00000000Provides the HN-F <n> non-secure error status.
por_cfgm_errgsr3_NS_u_hnd_nid80x000010311864roRead-only0x00000000Provides the SBSX <n> non-secure error status.
por_cfgm_errgsr4_NS_u_hnd_nid80x000010312064roRead-only0x00000000Provides the CXG <n> secure error status.
por_cfgm_errgsr5_NS_u_hnd_nid80x000010318064roRead-only0x00000000Provides the XP <n> non-secure fault status.
por_cfgm_errgsr6_NS_u_hnd_nid80x000010318864roRead-only0x00000000Provides the HN-I <n> non-secure fault status.
por_cfgm_errgsr7_NS_u_hnd_nid80x000010319064roRead-only0x00000000Provides the HN-F <n> non-secure fault status.
por_cfgm_errgsr8_NS_u_hnd_nid80x000010319864roRead-only0x00000000Provides the SBSX <n> non-secure fault status.
por_cfgm_errgsr9_NS_u_hnd_nid80x00001031A064roRead-only0x00000000Provides the CXG <n> secure error status.
por_cfgm_errdevaff_u_hnd_nid80x0000103FA864roRead-only0x00000000Functions as the device affinity register.
por_cfgm_errdevarch_u_hnd_nid80x0000103FB864mixedMixed types. See bit-field details.0x47700A0000000000Functions as the device architecture register.
por_cfgm_erridr_u_hnd_nid80x0000103FC864mixedMixed types. See bit-field details.0x0000001AContains the number of error records.
por_cfgm_errpidr45_u_hnd_nid80x0000103FD064mixedMixed types. See bit-field details.0x00000004Functions as the identification register for peripheral ID 4 and peripheral ID 5.
por_cfgm_errpidr67_u_hnd_nid80x0000103FD864mixedMixed types. See bit-field details.0x00000000Functions as the identification register for peripheral ID 6 and peripheral ID 7.
por_cfgm_errpidr01_u_hnd_nid80x0000103FE064mixedMixed types. See bit-field details.0xB400000034Functions as the identification register for peripheral ID 0 and peripheral ID 1.
por_cfgm_errpidr23_u_hnd_nid80x0000103FE864mixedMixed types. See bit-field details.0x00000007Functions as the identification register for peripheral ID 2 and peripheral ID 3.
por_cfgm_errcidr01_u_hnd_nid80x0000103FF064mixedMixed types. See bit-field details.0xFF0000000DFunctions as the identification register for component ID 0 and component ID 1.
por_cfgm_errcidr23_u_hnd_nid80x0000103FF864mixedMixed types. See bit-field details.0xB100000005Functions as the identification register for component ID 2 and component ID 3.
por_mxp_node_info_u_smxp_0_10x000010800064mixedMixed types. See bit-field details.0x300080006Provides component identification information.
por_mxp_device_port_connect_info_p0_u_smxp_0_10x000010800864mixedMixed types. See bit-field details.0x0000000AContains device port connection information for port 0.
por_mxp_device_port_connect_info_p1_u_smxp_0_10x000010801064mixedMixed types. See bit-field details.0x00000000Contains device port connection information for port 1.
por_mxp_mesh_port_connect_info_east_u_smxp_0_10x000010801864mixedMixed types. See bit-field details.0x00000000Contains port connection information for East port.
por_mxp_mesh_port_connect_info_north_u_smxp_0_10x000010802064mixedMixed types. See bit-field details.0x00000000Contains port connection information for North port.
por_mxp_child_info_u_smxp_0_10x000010808064mixedMixed types. See bit-field details.0x01000003Provides component child identification information.
por_mxp_child_pointer_0_u_smxp_0_10x000010810064mixedMixed types. See bit-field details.0x00150000Contains base address of the configuration slave for child 0.
por_mxp_child_pointer_1_u_smxp_0_10x000010810864mixedMixed types. See bit-field details.0x00130000Contains base address of the configuration slave for child 1.
por_mxp_child_pointer_2_u_smxp_0_10x000010811064mixedMixed types. See bit-field details.0x00120000Contains base address of the configuration slave for child 2.
por_mxp_child_pointer_3_u_smxp_0_10x000010811864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 3.
por_mxp_child_pointer_4_u_smxp_0_10x000010812064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 4.
por_mxp_child_pointer_5_u_smxp_0_10x000010812864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 5.
por_mxp_child_pointer_6_u_smxp_0_10x000010813064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 6.
por_mxp_child_pointer_7_u_smxp_0_10x000010813864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 7.
por_mxp_child_pointer_8_u_smxp_0_10x000010814064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 8.
por_mxp_child_pointer_9_u_smxp_0_10x000010814864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 9.
por_mxp_child_pointer_10_u_smxp_0_10x000010815064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 10.
por_mxp_child_pointer_11_u_smxp_0_10x000010815864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 11.
por_mxp_child_pointer_12_u_smxp_0_10x000010816064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 12.
por_mxp_child_pointer_13_u_smxp_0_10x000010816864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 13.
por_mxp_child_pointer_14_u_smxp_0_10x000010817064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 14.
por_mxp_child_pointer_15_u_smxp_0_10x000010817864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 15.
por_mxp_p0_info_u_smxp_0_10x000010890064mixedMixed types. See bit-field details.0x00000211Provides component identification information for XP port 0.
por_mxp_p1_info_u_smxp_0_10x000010890864mixedMixed types. See bit-field details.0x00000210Provides component identification information for XP port 1.
por_mxp_secure_register_groups_override_u_smxp_0_10x000010898064mixedMixed types. See bit-field details.0x00000000Allows non-secure access to predefined groups of secure registers.
por_mxp_aux_ctl_u_smxp_0_10x0000108A0064mixedMixed types. See bit-field details.0x00000000Functions as the auxiliary control register for XP.
por_mxp_p0_qos_control_u_smxp_0_10x0000108A8064mixedMixed types. See bit-field details.0x00000000Controls QoS settings for devices connected to port 0.
por_mxp_p0_qos_lat_tgt_u_smxp_0_10x0000108A8864mixedMixed types. See bit-field details.0x00000000Controls QoS target latency/period (in cycles) for regulation of devices connected to port 0.
por_mxp_p0_qos_lat_scale_u_smxp_0_10x0000108A9064mixedMixed types. See bit-field details.0x00000000Controls the QoS target scale factor for devices connected to port 0. The scale factor is represented in powers of two from the range 2^(-3) to 2^(-10).
por_mxp_p0_qos_lat_range_u_smxp_0_10x0000108A9864mixedMixed types. See bit-field details.0x00000000Controls the minimum and maximum QoS values generated by the QoS regulator for devices connected to port 0.
por_mxp_p1_qos_control_u_smxp_0_10x0000108AA064mixedMixed types. See bit-field details.0x00000000Controls QoS settings for devices connected to port 1.
por_mxp_p1_qos_lat_tgt_u_smxp_0_10x0000108AA864mixedMixed types. See bit-field details.0x00000000Controls QoS target latency/period (in cycles) for regulation of devices connected to port 1.
por_mxp_p1_qos_lat_scale_u_smxp_0_10x0000108AB064mixedMixed types. See bit-field details.0x00000000Controls the QoS target scale factor for devices connected to port 1. The scale factor is represented in powers of two from the range 2^(-3) to 2^(-10).
por_mxp_p1_qos_lat_range_u_smxp_0_10x0000108AB864mixedMixed types. See bit-field details.0x00000000Controls the minimum and maximum QoS values generated by the QoS regulator for devices connected to port 1.
por_mxp_p0_syscoreq_ctl_u_smxp_0_10x000010900064mixedMixed types. See bit-field details.0x00000000Functions as the port 0 snoop and DVM domain control register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p0_syscoack_status. NOTE: Only valid on RN-F ports.
por_mxp_p1_syscoreq_ctl_u_smxp_0_10x000010900864mixedMixed types. See bit-field details.0x00000000Functions as the port 1 snoop and DVM domain control register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p1_syscoack_status. NOTE: Only valid on RN-F ports.
por_mxp_p0_syscoack_status_u_smxp_0_10x000010901064mixedMixed types. See bit-field details.0x00000000Functions as the port 0 snoop and DVM domain status register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p0_syscoreq_ctl. NOTE: Only valid on RN-F ports.
por_mxp_p1_syscoack_status_u_smxp_0_10x000010901864mixedMixed types. See bit-field details.0x00000000Functions as the port 1 snoop and DVM domain status register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p1_syscoreq_ctl. NOTE: Only valid on RN-F ports.
por_mxp_pmu_event_sel_u_smxp_0_10x000010A00064mixedMixed types. See bit-field details.0x00000000Specifies the PMU event to be counted.
por_dtm_control_u_smxp_0_10x000010A10064mixedMixed types. See bit-field details.0x00000000Functions as the DTM control register.
por_dtm_fifo_entry_ready_u_smxp_0_10x000010A11864mixedMixed types. See bit-field details.0x00000000Controls status of DTM FIFO entries.
por_dtm_fifo_entry0_0_u_smxp_0_10x000010A12064roRead-only0x00000000Contains DTM FIFO entry 0 data.
por_dtm_fifo_entry0_1_u_smxp_0_10x000010A12864roRead-only0x00000000Contains DTM FIFO entry 0 data.
por_dtm_fifo_entry0_2_u_smxp_0_10x000010A13064mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 0 data.
por_dtm_fifo_entry1_0_u_smxp_0_10x000010A13864roRead-only0x00000000Contains DTM FIFO entry 1 data.
por_dtm_fifo_entry1_1_u_smxp_0_10x000010A14064roRead-only0x00000000Contains DTM FIFO entry 1 data.
por_dtm_fifo_entry1_2_u_smxp_0_10x000010A14864mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 1 data.
por_dtm_fifo_entry2_0_u_smxp_0_10x000010A15064roRead-only0x00000000Contains DTM FIFO entry 2 data.
por_dtm_fifo_entry2_1_u_smxp_0_10x000010A15864roRead-only0x00000000Contains DTM FIFO entry 2 data.
por_dtm_fifo_entry2_2_u_smxp_0_10x000010A16064mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 2 data.
por_dtm_fifo_entry3_0_u_smxp_0_10x000010A16864roRead-only0x00000000Contains DTM FIFO entry 3 data.
por_dtm_fifo_entry3_1_u_smxp_0_10x000010A17064roRead-only0x00000000Contains DTM FIFO entry 3 data.
por_dtm_fifo_entry3_2_u_smxp_0_10x000010A17864mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 3 data.
por_dtm_wp0_config_u_smxp_0_10x000010A1A064mixedMixed types. See bit-field details.0x00000000Configures watchpoint 0.
por_dtm_wp0_val_u_smxp_0_10x000010A1A864rwNormal read/write0x00000000Configures watchpoint 0 comparison value.
por_dtm_wp0_mask_u_smxp_0_10x000010A1B064rwNormal read/write0x00000000Configures watchpoint0 comparison mask.
por_dtm_wp1_config_u_smxp_0_10x000010A1B864mixedMixed types. See bit-field details.0x00000000Configures watchpoint 1.
por_dtm_wp1_val_u_smxp_0_10x000010A1C064rwNormal read/write0x00000000Configures watchpoint 1 comparison value.
por_dtm_wp1_mask_u_smxp_0_10x000010A1C864rwNormal read/write0x00000000Configures watchpoint 1 comparison mask.
por_dtm_wp2_config_u_smxp_0_10x000010A1D064mixedMixed types. See bit-field details.0x00000000Configures watchpoint 2.
por_dtm_wp2_val_u_smxp_0_10x000010A1D864rwNormal read/write0x00000000Configures watchpoint 2 comparison value.
por_dtm_wp2_mask_u_smxp_0_10x000010A1E064rwNormal read/write0x00000000Configures watchpoint 2 comparison mask.
por_dtm_wp3_config_u_smxp_0_10x000010A1E864mixedMixed types. See bit-field details.0x00000000Configures watchpoint 3.
por_dtm_wp3_val_u_smxp_0_10x000010A1F064rwNormal read/write0x00000000Configures watchpoint 3 comparison value.
por_dtm_wp3_mask_u_smxp_0_10x000010A1F864rwNormal read/write0x00000000Configures watchpoint 3 comparison mask.
por_dtm_pmsicr_u_smxp_0_10x000010A20064mixedMixed types. See bit-field details.0x00000000Functions as the sampling interval counter register.
por_dtm_pmsirr_u_smxp_0_10x000010A20864mixedMixed types. See bit-field details.0x00000000Functions as the sampling interval reload register.
por_dtm_pmu_config_u_smxp_0_10x000010A21064mixedMixed types. See bit-field details.0x00000000Configures the DTM PMU.
por_dtm_pmevcnt_u_smxp_0_10x000010A22064rwNormal read/write0x00000000Contains all PMU event counters (0, 1, 2, 3).
por_dtm_pmevcntsr_u_smxp_0_10x000010A24064rwNormal read/write0x00000000Functions as the PMU event counter shadow register for all counters (0, 1, 2, 3).
por_mxp_errfr_u_smxp_0_10x000010B00064mixedMixed types. See bit-field details.0x000000A1Functions as the error feature register.
por_mxp_errctlr_u_smxp_0_10x000010B00864mixedMixed types. See bit-field details.0x00000000Functions as the error control register. Controls whether specific error-handling interrupts and error detection/deferment are enabled.
por_mxp_errstatus_u_smxp_0_10x000010B01064mixedMixed types. See bit-field details.0x00000000Functions as the error status register. AV and MV bits must be cleared in the same cycle, otherwise the error record does not have a consistent view.
por_mxp_errmisc_u_smxp_0_10x000010B02864mixedMixed types. See bit-field details.0x00000000Functions as the miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors.
por_mxp_errfr_NS_u_smxp_0_10x000010B10064mixedMixed types. See bit-field details.0x000000A1Functions as the non-secure error feature register.
por_mxp_errctlr_NS_u_smxp_0_10x000010B10864mixedMixed types. See bit-field details.0x00000000Functions as the non-secure error control register. Controls whether specific error-handling interrupts and error detection/deferment are enabled.
por_mxp_errstatus_NS_u_smxp_0_10x000010B11064mixedMixed types. See bit-field details.0x00000000Functions as the non-secure error status register.
por_mxp_errmisc_NS_u_smxp_0_10x000010B12864mixedMixed types. See bit-field details.0x00000000Functions as the non-secure miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors.
por_dn_node_info_u_hnd_nid80x000012000064mixedMixed types. See bit-field details.0x00080001Provides component identification information.
por_dn_child_info_u_hnd_nid80x000012008064mixedMixed types. See bit-field details.0x00000000Provides component child identification information.
por_dn_build_info_u_hnd_nid80x000012090064mixedMixed types. See bit-field details.0x00000001Contains the configuration parameter values. Indicates the specific DN configuration.
por_dn_secure_register_groups_override_u_hnd_nid80x000012098064mixedMixed types. See bit-field details.0x00000000Allows non-secure access to predefined groups of secure registers.
por_dn_aux_ctl_u_hnd_nid80x0000120A0064mixedMixed types. See bit-field details.0x00000000Functions as the auxiliary control register for DN.
por_dn_vmf0_ctrl_u_hnd_nid80x0000120C0064mixedMixed types. See bit-field details.0xFFFF00000000Functions as the control register for VMID-based DVM snoop filtering. NOTE: This register has no effect when por_dn_aux_ctl.disable_vmf is set to 1.
por_dn_vmf0_rnf0_u_hnd_nid80x0000120C0864rwNormal read/write0x00000000Contains the logical RN-F bit vector 63:0 corresponding to por_dn_vmf0_ctrl.vmid. Used for VMID-based DVM snoop filtering.
por_dn_vmf0_rnd_u_hnd_nid80x0000120C1064rwNormal read/write0x00000000Contains the logical RN-D bit vector 63:0 corresponding to por_dn_vmf0_ctrl.vmid. Used for VMID-based DVM snoop filtering.
por_dn_vmf0_cxra_u_hnd_nid80x0000120C1864rwNormal read/write0x00000000Contains the logical CXRA bit vector 63:0 corresponding to por_dn_vmf0_ctrl.vmid. Used for VMID-based DVM snoop filtering. NOTE: Not applicable in a single-chip CMN-600 system. Does not have any effect.
por_dn_vmf1_ctrl_u_hnd_nid80x0000120C2064mixedMixed types. See bit-field details.0xFFFF00000000Functions as the control register for VMID-based DVM snoop filtering. NOTE: This register has no effect when por_dn_aux_ctl.disable_vmf is set to 1.
por_dn_vmf1_rnf0_u_hnd_nid80x0000120C2864rwNormal read/write0x00000000Contains the logical RN-F bit vector 63:0 corresponding to por_dn_vmf1_ctrl.vmid. Used for VMID-based DVM snoop filtering.
por_dn_vmf1_rnd_u_hnd_nid80x0000120C3064rwNormal read/write0x00000000Contains the logical RN-D bit vector 63:0 corresponding to por_dn_vmf1_ctrl.vmid. Used for VMID-based DVM snoop filtering.
por_dn_vmf1_cxra_u_hnd_nid80x0000120C3864rwNormal read/write0x00000000Contains the logical CXRA bit vector 63:0 corresponding to por_dn_vmf1_ctrl.vmid. Used for VMID-based DVM snoop filtering. NOTE: Not applicable in a single-chip CMN-600 system. Does not have any effect.
por_dn_vmf2_ctrl_u_hnd_nid80x0000120C4064mixedMixed types. See bit-field details.0xFFFF00000000Functions as the control register for VMID-based DVM snoop filtering. NOTE: This register has no effect when por_dn_aux_ctl.disable_vmf is set to 1.
por_dn_vmf2_rnf0_u_hnd_nid80x0000120C4864rwNormal read/write0x00000000Contains the logical RN-F bit vector 63:0 corresponding to por_dn_vmf2_ctrl.vmid. Used for VMID-based DVM snoop filtering.
por_dn_vmf2_rnd_u_hnd_nid80x0000120C5064rwNormal read/write0x00000000Contains the logical RN-D bit vector 63:0 corresponding to por_dn_vmf2_ctrl.vmid. Used for VMID-based DVM snoop filtering.
por_dn_vmf2_cxra_u_hnd_nid80x0000120C5864rwNormal read/write0x00000000Contains the logical CXRA bit vector 63:0 corresponding to por_dn_vmf2_ctrl.vmid. Used for VMID-based DVM snoop filtering. NOTE: Not applicable in a single-chip CMN-600 system. Does not have any effect.
por_dn_vmf3_ctrl_u_hnd_nid80x0000120C6064mixedMixed types. See bit-field details.0xFFFF00000000Functions as the control register for VMID-based DVM snoop filtering. NOTE: This register has no effect when por_dn_aux_ctl.disable_vmf is set to 1.
por_dn_vmf3_rnf0_u_hnd_nid80x0000120C6864rwNormal read/write0x00000000Contains the logical RN-F bit vector 63:0 corresponding to por_dn_vmf3_ctrl.vmid. Used for VMID-based DVM snoop filtering.
por_dn_vmf3_rnd_u_hnd_nid80x0000120C7064rwNormal read/write0x00000000Contains the logical RN-D bit vector 63:0 corresponding to por_dn_vmf3_ctrl.vmid. Used for VMID-based DVM snoop filtering.
por_dn_vmf3_cxra_u_hnd_nid80x0000120C7864rwNormal read/write0x00000000Contains the logical CXRA bit vector 63:0 corresponding to por_dn_vmf3_ctrl.vmid. Used for VMID-based DVM snoop filtering. NOTE: Not applicable in a single-chip CMN-600 system. Does not have any effect.
por_dn_pmu_event_sel_u_hnd_nid80x000012200064mixedMixed types. See bit-field details.0x00000000Specifies the PMU event to be counted.
por_dt_node_info_u_hnd_nid80x000013000064mixedMixed types. See bit-field details.0x00080003Provides component identification information.
por_dt_child_info_u_hnd_nid80x000013008064mixedMixed types. See bit-field details.0x00000000Provides component child identification information.
por_dt_secure_access_u_hnd_nid80x000013098064mixedMixed types. See bit-field details.0x00000000Functions as the secure access control register.
por_dt_dtc_ctl_u_hnd_nid80x0000130A0064mixedMixed types. See bit-field details.0x00000000Functions as the debug trace control register.
por_dt_trigger_status_u_hnd_nid80x0000130A1064mixedMixed types. See bit-field details.0x00000000Provides the trigger status.
por_dt_trigger_status_clr_u_hnd_nid80x0000130A2064woWrite-only0x00000000Clears the trigger status.
por_dt_trace_control_u_hnd_nid80x0000130A3064mixedMixed types. See bit-field details.0x00000000Functions as the trace control register.
por_dt_traceid_u_hnd_nid80x0000130A4864mixedMixed types. See bit-field details.0x00000000Contains the ATB ID.
por_dt_pmevcntAB_u_hnd_nid80x000013200064rwNormal read/write0x00000000Contains the PMU event counters A and B.
por_dt_pmevcntCD_u_hnd_nid80x000013201064rwNormal read/write0x00000000Contains the PMU event counters C and D.
por_dt_pmevcntEF_u_hnd_nid80x000013202064rwNormal read/write0x00000000Contains the PMU event counters E and F.
por_dt_pmevcntGH_u_hnd_nid80x000013203064rwNormal read/write0x00000000Contains the PMU event counters G and H.
por_dt_pmccntr_u_hnd_nid80x000013204064mixedMixed types. See bit-field details.0x00000000Contains the PMU cycle counter.
por_dt_pmevcntsrAB_u_hnd_nid80x000013205064rwNormal read/write0x00000000Contains the PMU event counter shadow registers A and B.
por_dt_pmevcntsrCD_u_hnd_nid80x000013206064rwNormal read/write0x00000000Contains the PMU event counter shadow registers C and D.
por_dt_pmevcntsrEF_u_hnd_nid80x000013207064rwNormal read/write0x00000000Contains the PMU event counter shadow registers E and F.
por_dt_pmevcntsrGH_u_hnd_nid80x000013208064rwNormal read/write0x00000000Contains the PMU event counter shadow registers G and H.
por_dt_pmccntrsr_u_hnd_nid80x000013209064mixedMixed types. See bit-field details.0x00000000Contains the PMU cycle counter shadow register.
por_dt_pmcr_u_hnd_nid80x000013210064mixedMixed types. See bit-field details.0x00000000Functions as the PMU control register.
por_dt_pmovsr_u_hnd_nid80x000013211864mixedMixed types. See bit-field details.0x00000000Provides the PMU overflow status.
por_dt_pmovsr_clr_u_hnd_nid80x000013212064woWrite-only0x00000000Clears the PMU overflow status.
por_dt_pmssr_u_hnd_nid80x000013212864mixedMixed types. See bit-field details.0x00000000Provides the PMU snapshot status.
por_dt_pmsrr_u_hnd_nid80x000013213064woWrite-only0x00000000Sends PMU snapshot requests.
por_dt_claim_u_hnd_nid80x0000132DA064rwNormal read/write0xFFFFFFFFFunctions as the claim tag set register.
por_dt_devaff_u_hnd_nid80x0000132DA864roRead-only0x00000000Functions as the device affinity register.
por_dt_lsr_u_hnd_nid80x0000132DB064mixedMixed types. See bit-field details.0x00000000Functions as the lock status register.
por_dt_authstatus_devarch_u_hnd_nid80x0000132DB864mixedMixed types. See bit-field details.0x10000000000088Functions as the authentication status register and the device architecture register.
por_dt_devid_u_hnd_nid80x0000132DC064roRead-only0x00000000Functions as the device configuration register.
por_dt_devtype_u_hnd_nid80x0000132DC864mixedMixed types. See bit-field details.0x4300000000Functions as the device type identifier register.
por_dt_pidr45_u_hnd_nid80x0000132DD064mixedMixed types. See bit-field details.0x00000004Functions as the identification register for peripheral ID 4 and peripheral ID 5.
por_dt_pidr67_u_hnd_nid80x0000132DD864mixedMixed types. See bit-field details.0x00000000Functions as the identification register for peripheral ID 6 and peripheral ID 7.
por_dt_pidr01_u_hnd_nid80x0000132DE064mixedMixed types. See bit-field details.0xB400000034Functions as the identification register for peripheral ID 0 and peripheral ID 1.
por_dt_pidr23_u_hnd_nid80x0000132DE864mixedMixed types. See bit-field details.0x00000007Functions as the identification register for peripheral ID 2 and peripheral ID 3.
por_dt_cidr01_u_hnd_nid80x0000132DF064mixedMixed types. See bit-field details.0x9F0000000DFunctions as the identification register for component ID 0 and component ID 1.
por_dt_cidr23_u_hnd_nid80x0000132DF864mixedMixed types. See bit-field details.0xB100000005Functions as the identification register for component ID 2 and component ID 3.
por_hni_node_info_u_hnd_nid80x000015000064mixedMixed types. See bit-field details.0x00080004Provides component identification information.
por_hni_child_info_u_hnd_nid80x000015008064mixedMixed types. See bit-field details.0x00000000Provides component child identification information.
por_hni_unit_info_u_hnd_nid80x000015090064mixedMixed types. See bit-field details.0x08080820Provides component identification information for HN-I.
por_hni_secure_register_groups_override_u_hnd_nid80x000015098064mixedMixed types. See bit-field details.0x00000000Allows non-secure access to predefined groups of secure registers.
por_hni_cfg_ctl_u_hnd_nid80x0000150A0064mixedMixed types. See bit-field details.0x00000001Functions as the configuration control register for HN-I.
por_hni_aux_ctl_u_hnd_nid80x0000150A0864mixedMixed types. See bit-field details.0x00000000Functions as the auxiliary control register for HN-I.
por_hni_sam_addrregion0_cfg_u_hnd_nid80x0000150C0064mixedMixed types. See bit-field details.0x600000000000003FConfigures Address Region 0.
por_hni_sam_addrregion1_cfg_u_hnd_nid80x0000150C0864mixedMixed types. See bit-field details.0x6000000000000000Configures Address Region 1.
por_hni_sam_addrregion2_cfg_u_hnd_nid80x0000150C1064mixedMixed types. See bit-field details.0x6000000000000000Configures Address Region 2.
por_hni_sam_addrregion3_cfg_u_hnd_nid80x0000150C1864mixedMixed types. See bit-field details.0x6000000000000000Configures Address Region 3.
por_hni_pmu_event_sel_u_hnd_nid80x000015200064mixedMixed types. See bit-field details.0x00000000Specifies the PMU event to be counted.
por_hni_errfr_u_hnd_nid80x000015300064mixedMixed types. See bit-field details.0x000000A5Functions as the error feature register.
por_hni_errctlr_u_hnd_nid80x000015300864mixedMixed types. See bit-field details.0x00000000Functions as the error control register. Controls whether specific error-handling interrupts and error detection/deferment are enabled.
por_hni_errstatus_u_hnd_nid80x000015301064mixedMixed types. See bit-field details.0x00000000Functions as the error status register. AV and MV bits must be cleared in the same cycle, otherwise the error record does not have a consistent view.
por_hni_erraddr_u_hnd_nid80x000015301864mixedMixed types. See bit-field details.0x00000000Contains the error record address.
por_hni_errmisc_u_hnd_nid80x000015302064mixedMixed types. See bit-field details.0x00000000Functions as the miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors.
por_hni_errfr_NS_u_hnd_nid80x000015310064mixedMixed types. See bit-field details.0x000000A5Functions as the non-secure error feature register.
por_hni_errctlr_NS_u_hnd_nid80x000015310864mixedMixed types. See bit-field details.0x00000000Functions as the non-secure error control register. Controls whether specific error-handling interrupts and error detection/deferment are enabled.
por_hni_errstatus_NS_u_hnd_nid80x000015311064mixedMixed types. See bit-field details.0x00000000Functions as the non-secure error status register.
por_hni_erraddr_NS_u_hnd_nid80x000015311864mixedMixed types. See bit-field details.0x00000000Contains the non-secure error record address.
por_hni_errmisc_NS_u_hnd_nid80x000015312064mixedMixed types. See bit-field details.0x00000000Functions as the non-secure miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors.
por_sbsx_node_info_u_sbsx_nid320x000040000064mixedMixed types. See bit-field details.0x00200007Provides component identification information.
por_sbsx_child_info_u_sbsx_nid320x000040008064mixedMixed types. See bit-field details.0x00000000Provides component child identification information.
por_sbsx_unit_info_u_sbsx_nid320x000040090064mixedMixed types. See bit-field details.0x00104010Provides component identification information for SBSX.
por_sbsx_aux_ctl_u_sbsx_nid320x0000400A0864mixedMixed types. See bit-field details.0x00000000Functions as the auxiliary control register for the SBSX bridge.
por_sbsx_pmu_event_sel_u_sbsx_nid320x000040200064mixedMixed types. See bit-field details.0x00000000Specifies the PMU event to be counted.
por_hnf_node_info_u_hnf_nid360x000040400064mixedMixed types. See bit-field details.0x00240005Provides component identification information.
por_hnf_child_info_u_hnf_nid360x000040408064mixedMixed types. See bit-field details.0x00000000Provides component child identification information.
por_hnf_unit_info_u_hnf_nid360x000040490064mixedMixed types. See bit-field details.0x4040211020Provides component identification information for HN-F.
por_hnf_secure_register_groups_override_u_hnf_nid360x000040498064mixedMixed types. See bit-field details.0x00000000Allows non-secure access to predefined groups of secure registers.
por_hnf_cfg_ctl_u_hnf_nid360x0000404A0064mixedMixed types. See bit-field details.0x00000000Functions as the configuration control register for HN-F.
por_hnf_aux_ctl_u_hnf_nid360x0000404A0864mixedMixed types. See bit-field details.0x1C4C0000000002Functions as the auxiliary control register for HN-F.
por_hnf_qos_band_u_hnf_nid360x0000404A8064mixedMixed types. See bit-field details.0xFFECB870Provides QoS classifications based on the QoS value ranges.
por_hnf_qos_reservation_u_hnf_nid360x0000404A8864mixedMixed types. See bit-field details.0x13F3E1F0AControls POCQ maximum occupancy counts for each QoS class (HighHigh, High, Medium, and Low).
por_hnf_rn_starvation_u_hnf_nid360x0000404A9064mixedMixed types. See bit-field details.0x1F3F1F3F3F1FControls starvation counts for each QoS class. Determines static credit grantee selection.
por_hnf_cfg_slcsf_dbgrd_u_hnf_nid360x0000404B8064woWrite-only0x00000000Controls access modes for SLC tasg, SLC data, and SF tag debug read.
por_hnf_slc_cache_access_slc_tag_u_hnf_nid360x0000404B8864mixedMixed types. See bit-field details.0x00000000Contains SLC tag debug read data.
por_hnf_slc_cache_access_slc_data_u_hnf_nid360x0000404B9064roRead-only0x00000000Contains SLC data RAM debug read data.
por_hnf_slc_cache_access_sf_tag_u_hnf_nid360x0000404B9864roRead-only0x00000000Contains SF tag debug read data. Bits[63:0]
por_hnf_slc_lock_ways_u_hnf_nid360x0000404C0064mixedMixed types. See bit-field details.0x00000200Controls SLC way lock settings.
por_hnf_slc_lock_base0_u_hnf_nid360x0000404C0864mixedMixed types. See bit-field details.0x00000000Functions as the base register for lock region 0 [47:0].
por_hnf_slc_lock_base1_u_hnf_nid360x0000404C1064mixedMixed types. See bit-field details.0x00000000Functions as the base register for lock region 1 [47:0].
por_hnf_slc_lock_base2_u_hnf_nid360x0000404C1864mixedMixed types. See bit-field details.0x00000000Functions as the base register for lock region 2 [47:0].
por_hnf_slc_lock_base3_u_hnf_nid360x0000404C2064mixedMixed types. See bit-field details.0x00000000Functions as the base register for lock region 3 [47:0].
por_hnf_rni_region_vec_u_hnf_nid360x0000404C3064mixedMixed types. See bit-field details.0x00000000Functions as the control register for RN-I source SLC way allocation.
por_hnf_rnf_region_vec_u_hnf_nid360x0000404C3864rwNormal read/write0x00000000Functions as the control register for RN-F source SLC way allocation.
por_hnf_rnd_region_vec_u_hnf_nid360x0000404C4064mixedMixed types. See bit-field details.0x00000000Functions as the control register for RN-D source SLC way allocation.
por_hnf_sam_control_u_hnf_nid360x0000404D0064mixedMixed types. See bit-field details.0x00000000Configures HN-F SAM. All top_address_bit fields must be between bits 47 and 28 of the address. top_address_bit2 > top_address_bit1 > top_address_bit0. Must be configured to match corresponding por_rnsam_sys_cache_grp_sn_sam_cfgN register in the RN SAM.
por_hnf_sam_memregion0_u_hnf_nid360x0000404D0864mixedMixed types. See bit-field details.0x00000000Configures range-based memory region 0 in HN-F SAM.
por_hnf_sam_memregion1_u_hnf_nid360x0000404D1064mixedMixed types. See bit-field details.0x00000000Configures range-based memory region 1 in HN-F SAM.
por_hnf_sam_sn_properties_u_hnf_nid360x0000404D1864mixedMixed types. See bit-field details.0x00000000Configures properties for all six SN targets and two range-based SN targets.
por_hnf_sam_6sn_nodeid_u_hnf_nid360x0000404D2064mixedMixed types. See bit-field details.0x00000000Configures node IDs for slave nodes 3 to 5 in 6-SN configuration mode.
por_hnf_rn_phys_id0_u_hnf_nid360x0000404D2864mixedMixed types. See bit-field details.0x8000004C80000040Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id1_u_hnf_nid360x0000404D3064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id2_u_hnf_nid360x0000404D3864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id3_u_hnf_nid360x0000404D4064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id4_u_hnf_nid360x0000404D4864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id5_u_hnf_nid360x0000404D5064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id6_u_hnf_nid360x0000404D5864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id7_u_hnf_nid360x0000404D6064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id8_u_hnf_nid360x0000404D6864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id9_u_hnf_nid360x0000404D7064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id10_u_hnf_nid360x0000404D7864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id11_u_hnf_nid360x0000404D8064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id12_u_hnf_nid360x0000404D8864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id13_u_hnf_nid360x0000404D9064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id14_u_hnf_nid360x0000404D9864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id15_u_hnf_nid360x0000404DA064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id16_u_hnf_nid360x0000404DA864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id17_u_hnf_nid360x0000404DB064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id18_u_hnf_nid360x0000404DB864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id19_u_hnf_nid360x0000404DC064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id20_u_hnf_nid360x0000404DC864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id21_u_hnf_nid360x0000404DD064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id22_u_hnf_nid360x0000404DD864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id23_u_hnf_nid360x0000404DE064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id24_u_hnf_nid360x0000404DE864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id25_u_hnf_nid360x0000404DF064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id26_u_hnf_nid360x0000404DF864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id27_u_hnf_nid360x0000404E0064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id28_u_hnf_nid360x0000404E0864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id29_u_hnf_nid360x0000404E1064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id30_u_hnf_nid360x0000404E1864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id31_u_hnf_nid360x0000404E2064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_sf_cxg_blocked_ways_u_hnf_nid360x0000404F0064mixedMixed types. See bit-field details.0x00000000Specifies the SF ways that are blocked for remote chip to use in CML mode.
por_hnf_cml_port_aggr_grp0_add_mask_u_hnf_nid360x0000404F1064mixedMixed types. See bit-field details.0x00000040Configures the CCIX port aggregation address mask for group 0.
por_hnf_cml_port_aggr_grp1_add_mask_u_hnf_nid360x0000404F1864mixedMixed types. See bit-field details.0x00000040Configures the CCIX port aggregation address mask for group 1.
por_hnf_cml_port_aggr_grp0_reg_u_hnf_nid360x0000404F2864mixedMixed types. See bit-field details.0x00000000Configures the CCIX port aggregation port IDs for group 0.
por_hnf_cml_port_aggr_grp1_reg_u_hnf_nid360x0000404F3064mixedMixed types. See bit-field details.0x00000000Configures the CCIX port aggregation port IDs for group 1.
por_hnf_ppu_pwpr_u_hnf_nid360x000040500032mixedMixed types. See bit-field details.0x00000000Functions as the power policy register for HN-F.
por_hnf_ppu_pwsr_u_hnf_nid360x000040500832mixedMixed types. See bit-field details.0x00000038Provides power status information for HN-F.
por_hnf_ppu_misr_u_hnf_nid360x000040501432mixedMixed types. See bit-field details.0x00000000Functions as the power miscellaneous input current status register for HN-F.
por_hnf_ppu_dyn_ret_threshold_u_hnf_nid360x000040510064mixedMixed types. See bit-field details.0x00000000Configures the dynamic retention threshold for SLC and SF RAM.
por_hnf_ppu_idr0_u_hnf_nid360x0000405FB032mixedMixed types. See bit-field details.0x0801A540Provides identification information for the HN-F PPU.
por_hnf_ppu_idr1_u_hnf_nid360x0000405FB432mixedMixed types. See bit-field details.0x00000000Provides identification information for the HN-F PPU.
por_hnf_ppu_iidr_u_hnf_nid360x0000405FC832roRead-only0x4340043BFunctions as the power implementation identification register for HN-F.
por_hnf_ppu_aidr_u_hnf_nid360x0000405FCC32mixedMixed types. See bit-field details.0x00000011Functions as the power architecture identification register for HN-F.
por_hnf_pmu_event_sel_u_hnf_nid360x000040600064mixedMixed types. See bit-field details.0x00000000Specifies the PMU event to be counted.
por_hnf_errfr_u_hnf_nid360x000040700064mixedMixed types. See bit-field details.0x000048A5Functions as the error feature register.
por_hnf_errctlr_u_hnf_nid360x000040700864mixedMixed types. See bit-field details.0x00000000Functions as the error control register. Controls whether specific error-handling interrupts and error detection/deferment are enabled.
por_hnf_errstatus_u_hnf_nid360x000040701064mixedMixed types. See bit-field details.0x00000000Functions as the error status register. AV and MV bits must be cleared in the same cycle, otherwise the error record does not have a consistent view.
por_hnf_erraddr_u_hnf_nid360x000040701864mixedMixed types. See bit-field details.0x00000000Contains the error record address.
por_hnf_errmisc_u_hnf_nid360x000040702064mixedMixed types. See bit-field details.0x00000000Functions as the miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors.
por_hnf_err_inj_u_hnf_nid360x000040703064mixedMixed types. See bit-field details.0x00000000Enables error injection and setup. When enabled for a given source ID and logic processor ID, HN-F returns a slave error and reports an error interrupt. This error interrupt emulates a SLC double-bit data ECC error. This feature enables software to test the error handler. The slave error is reported for cacheable read access for which SLC hit is the data source. No slave error or error interrupt is reported for cacheable read access in which SLC miss is the data source.
por_hnf_errfr_NS_u_hnf_nid360x000040710064mixedMixed types. See bit-field details.0x000048A5Functions as the non-secure error feature register.
por_hnf_errctlr_NS_u_hnf_nid360x000040710864mixedMixed types. See bit-field details.0x00000000Functions as the non-secure error control register. Controls whether specific error-handling interrupts and error detection/deferment are enabled.
por_hnf_errstatus_NS_u_hnf_nid360x000040711064mixedMixed types. See bit-field details.0x00000000Functions as the non-secure error status register. AV and MV bits must be cleared in the same cycle, otherwise the error record does not have a consistent view.
por_hnf_erraddr_NS_u_hnf_nid360x000040711864mixedMixed types. See bit-field details.0x00000000Contains the non-secure error record address.
por_hnf_errmisc_NS_u_hnf_nid360x000040712064mixedMixed types. See bit-field details.0x00000000Functions as the non-secure miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors.
por_mxp_node_info_u_smxp_1_00x000040800064mixedMixed types. See bit-field details.0x100200006Provides component identification information.
por_mxp_device_port_connect_info_p0_u_smxp_1_00x000040800864mixedMixed types. See bit-field details.0x0000000DContains device port connection information for port 0.
por_mxp_device_port_connect_info_p1_u_smxp_1_00x000040801064mixedMixed types. See bit-field details.0x0001000EContains device port connection information for port 1.
por_mxp_mesh_port_connect_info_east_u_smxp_1_00x000040801864mixedMixed types. See bit-field details.0x00000000Contains port connection information for East port.
por_mxp_mesh_port_connect_info_north_u_smxp_1_00x000040802064mixedMixed types. See bit-field details.0x00000000Contains port connection information for North port.
por_mxp_child_info_u_smxp_1_00x000040808064mixedMixed types. See bit-field details.0x01000002Provides component child identification information.
por_mxp_child_pointer_0_u_smxp_1_00x000040810064mixedMixed types. See bit-field details.0x00404000Contains base address of the configuration slave for child 0.
por_mxp_child_pointer_1_u_smxp_1_00x000040810864mixedMixed types. See bit-field details.0x00400000Contains base address of the configuration slave for child 1.
por_mxp_child_pointer_2_u_smxp_1_00x000040811064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 2.
por_mxp_child_pointer_3_u_smxp_1_00x000040811864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 3.
por_mxp_child_pointer_4_u_smxp_1_00x000040812064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 4.
por_mxp_child_pointer_5_u_smxp_1_00x000040812864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 5.
por_mxp_child_pointer_6_u_smxp_1_00x000040813064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 6.
por_mxp_child_pointer_7_u_smxp_1_00x000040813864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 7.
por_mxp_child_pointer_8_u_smxp_1_00x000040814064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 8.
por_mxp_child_pointer_9_u_smxp_1_00x000040814864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 9.
por_mxp_child_pointer_10_u_smxp_1_00x000040815064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 10.
por_mxp_child_pointer_11_u_smxp_1_00x000040815864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 11.
por_mxp_child_pointer_12_u_smxp_1_00x000040816064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 12.
por_mxp_child_pointer_13_u_smxp_1_00x000040816864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 13.
por_mxp_child_pointer_14_u_smxp_1_00x000040817064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 14.
por_mxp_child_pointer_15_u_smxp_1_00x000040817864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 15.
por_mxp_p0_info_u_smxp_1_00x000040890064mixedMixed types. See bit-field details.0x00000211Provides component identification information for XP port 0.
por_mxp_p1_info_u_smxp_1_00x000040890864mixedMixed types. See bit-field details.0x00000211Provides component identification information for XP port 1.
por_mxp_secure_register_groups_override_u_smxp_1_00x000040898064mixedMixed types. See bit-field details.0x00000000Allows non-secure access to predefined groups of secure registers.
por_mxp_aux_ctl_u_smxp_1_00x0000408A0064mixedMixed types. See bit-field details.0x00000000Functions as the auxiliary control register for XP.
por_mxp_p0_qos_control_u_smxp_1_00x0000408A8064mixedMixed types. See bit-field details.0x00000000Controls QoS settings for devices connected to port 0.
por_mxp_p0_qos_lat_tgt_u_smxp_1_00x0000408A8864mixedMixed types. See bit-field details.0x00000000Controls QoS target latency/period (in cycles) for regulation of devices connected to port 0.
por_mxp_p0_qos_lat_scale_u_smxp_1_00x0000408A9064mixedMixed types. See bit-field details.0x00000000Controls the QoS target scale factor for devices connected to port 0. The scale factor is represented in powers of two from the range 2^(-3) to 2^(-10).
por_mxp_p0_qos_lat_range_u_smxp_1_00x0000408A9864mixedMixed types. See bit-field details.0x00000000Controls the minimum and maximum QoS values generated by the QoS regulator for devices connected to port 0.
por_mxp_p1_qos_control_u_smxp_1_00x0000408AA064mixedMixed types. See bit-field details.0x00000000Controls QoS settings for devices connected to port 1.
por_mxp_p1_qos_lat_tgt_u_smxp_1_00x0000408AA864mixedMixed types. See bit-field details.0x00000000Controls QoS target latency/period (in cycles) for regulation of devices connected to port 1.
por_mxp_p1_qos_lat_scale_u_smxp_1_00x0000408AB064mixedMixed types. See bit-field details.0x00000000Controls the QoS target scale factor for devices connected to port 1. The scale factor is represented in powers of two from the range 2^(-3) to 2^(-10).
por_mxp_p1_qos_lat_range_u_smxp_1_00x0000408AB864mixedMixed types. See bit-field details.0x00000000Controls the minimum and maximum QoS values generated by the QoS regulator for devices connected to port 1.
por_mxp_p0_syscoreq_ctl_u_smxp_1_00x000040900064mixedMixed types. See bit-field details.0x00000000Functions as the port 0 snoop and DVM domain control register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p0_syscoack_status. NOTE: Only valid on RN-F ports.
por_mxp_p1_syscoreq_ctl_u_smxp_1_00x000040900864mixedMixed types. See bit-field details.0x00000000Functions as the port 1 snoop and DVM domain control register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p1_syscoack_status. NOTE: Only valid on RN-F ports.
por_mxp_p0_syscoack_status_u_smxp_1_00x000040901064mixedMixed types. See bit-field details.0x00000000Functions as the port 0 snoop and DVM domain status register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p0_syscoreq_ctl. NOTE: Only valid on RN-F ports.
por_mxp_p1_syscoack_status_u_smxp_1_00x000040901864mixedMixed types. See bit-field details.0x00000000Functions as the port 1 snoop and DVM domain status register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p1_syscoreq_ctl. NOTE: Only valid on RN-F ports.
por_mxp_pmu_event_sel_u_smxp_1_00x000040A00064mixedMixed types. See bit-field details.0x00000000Specifies the PMU event to be counted.
por_dtm_control_u_smxp_1_00x000040A10064mixedMixed types. See bit-field details.0x00000000Functions as the DTM control register.
por_dtm_fifo_entry_ready_u_smxp_1_00x000040A11864mixedMixed types. See bit-field details.0x00000000Controls status of DTM FIFO entries.
por_dtm_fifo_entry0_0_u_smxp_1_00x000040A12064roRead-only0x00000000Contains DTM FIFO entry 0 data.
por_dtm_fifo_entry0_1_u_smxp_1_00x000040A12864roRead-only0x00000000Contains DTM FIFO entry 0 data.
por_dtm_fifo_entry0_2_u_smxp_1_00x000040A13064mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 0 data.
por_dtm_fifo_entry1_0_u_smxp_1_00x000040A13864roRead-only0x00000000Contains DTM FIFO entry 1 data.
por_dtm_fifo_entry1_1_u_smxp_1_00x000040A14064roRead-only0x00000000Contains DTM FIFO entry 1 data.
por_dtm_fifo_entry1_2_u_smxp_1_00x000040A14864mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 1 data.
por_dtm_fifo_entry2_0_u_smxp_1_00x000040A15064roRead-only0x00000000Contains DTM FIFO entry 2 data.
por_dtm_fifo_entry2_1_u_smxp_1_00x000040A15864roRead-only0x00000000Contains DTM FIFO entry 2 data.
por_dtm_fifo_entry2_2_u_smxp_1_00x000040A16064mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 2 data.
por_dtm_fifo_entry3_0_u_smxp_1_00x000040A16864roRead-only0x00000000Contains DTM FIFO entry 3 data.
por_dtm_fifo_entry3_1_u_smxp_1_00x000040A17064roRead-only0x00000000Contains DTM FIFO entry 3 data.
por_dtm_fifo_entry3_2_u_smxp_1_00x000040A17864mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 3 data.
por_dtm_wp0_config_u_smxp_1_00x000040A1A064mixedMixed types. See bit-field details.0x00000000Configures watchpoint 0.
por_dtm_wp0_val_u_smxp_1_00x000040A1A864rwNormal read/write0x00000000Configures watchpoint 0 comparison value.
por_dtm_wp0_mask_u_smxp_1_00x000040A1B064rwNormal read/write0x00000000Configures watchpoint0 comparison mask.
por_dtm_wp1_config_u_smxp_1_00x000040A1B864mixedMixed types. See bit-field details.0x00000000Configures watchpoint 1.
por_dtm_wp1_val_u_smxp_1_00x000040A1C064rwNormal read/write0x00000000Configures watchpoint 1 comparison value.
por_dtm_wp1_mask_u_smxp_1_00x000040A1C864rwNormal read/write0x00000000Configures watchpoint 1 comparison mask.
por_dtm_wp2_config_u_smxp_1_00x000040A1D064mixedMixed types. See bit-field details.0x00000000Configures watchpoint 2.
por_dtm_wp2_val_u_smxp_1_00x000040A1D864rwNormal read/write0x00000000Configures watchpoint 2 comparison value.
por_dtm_wp2_mask_u_smxp_1_00x000040A1E064rwNormal read/write0x00000000Configures watchpoint 2 comparison mask.
por_dtm_wp3_config_u_smxp_1_00x000040A1E864mixedMixed types. See bit-field details.0x00000000Configures watchpoint 3.
por_dtm_wp3_val_u_smxp_1_00x000040A1F064rwNormal read/write0x00000000Configures watchpoint 3 comparison value.
por_dtm_wp3_mask_u_smxp_1_00x000040A1F864rwNormal read/write0x00000000Configures watchpoint 3 comparison mask.
por_dtm_pmsicr_u_smxp_1_00x000040A20064mixedMixed types. See bit-field details.0x00000000Functions as the sampling interval counter register.
por_dtm_pmsirr_u_smxp_1_00x000040A20864mixedMixed types. See bit-field details.0x00000000Functions as the sampling interval reload register.
por_dtm_pmu_config_u_smxp_1_00x000040A21064mixedMixed types. See bit-field details.0x00000000Configures the DTM PMU.
por_dtm_pmevcnt_u_smxp_1_00x000040A22064rwNormal read/write0x00000000Contains all PMU event counters (0, 1, 2, 3).
por_dtm_pmevcntsr_u_smxp_1_00x000040A24064rwNormal read/write0x00000000Functions as the PMU event counter shadow register for all counters (0, 1, 2, 3).
por_mxp_errfr_u_smxp_1_00x000040B00064mixedMixed types. See bit-field details.0x000000A1Functions as the error feature register.
por_mxp_errctlr_u_smxp_1_00x000040B00864mixedMixed types. See bit-field details.0x00000000Functions as the error control register. Controls whether specific error-handling interrupts and error detection/deferment are enabled.
por_mxp_errstatus_u_smxp_1_00x000040B01064mixedMixed types. See bit-field details.0x00000000Functions as the error status register. AV and MV bits must be cleared in the same cycle, otherwise the error record does not have a consistent view.
por_mxp_errmisc_u_smxp_1_00x000040B02864mixedMixed types. See bit-field details.0x00000000Functions as the miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors.
por_mxp_errfr_NS_u_smxp_1_00x000040B10064mixedMixed types. See bit-field details.0x000000A1Functions as the non-secure error feature register.
por_mxp_errctlr_NS_u_smxp_1_00x000040B10864mixedMixed types. See bit-field details.0x00000000Functions as the non-secure error control register. Controls whether specific error-handling interrupts and error detection/deferment are enabled.
por_mxp_errstatus_NS_u_smxp_1_00x000040B11064mixedMixed types. See bit-field details.0x00000000Functions as the non-secure error status register.
por_mxp_errmisc_NS_u_smxp_1_00x000040B12864mixedMixed types. See bit-field details.0x00000000Functions as the non-secure miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors.
por_hnf_node_info_u_hnf_nid400x000050000064mixedMixed types. See bit-field details.0x100280005Provides component identification information.
por_hnf_child_info_u_hnf_nid400x000050008064mixedMixed types. See bit-field details.0x00000000Provides component child identification information.
por_hnf_unit_info_u_hnf_nid400x000050090064mixedMixed types. See bit-field details.0x4040211020Provides component identification information for HN-F.
por_hnf_secure_register_groups_override_u_hnf_nid400x000050098064mixedMixed types. See bit-field details.0x00000000Allows non-secure access to predefined groups of secure registers.
por_hnf_cfg_ctl_u_hnf_nid400x0000500A0064mixedMixed types. See bit-field details.0x00000000Functions as the configuration control register for HN-F.
por_hnf_aux_ctl_u_hnf_nid400x0000500A0864mixedMixed types. See bit-field details.0x1C4C0000000002Functions as the auxiliary control register for HN-F.
por_hnf_qos_band_u_hnf_nid400x0000500A8064mixedMixed types. See bit-field details.0xFFECB870Provides QoS classifications based on the QoS value ranges.
por_hnf_qos_reservation_u_hnf_nid400x0000500A8864mixedMixed types. See bit-field details.0x13F3E1F0AControls POCQ maximum occupancy counts for each QoS class (HighHigh, High, Medium, and Low).
por_hnf_rn_starvation_u_hnf_nid400x0000500A9064mixedMixed types. See bit-field details.0x1F3F1F3F3F1FControls starvation counts for each QoS class. Determines static credit grantee selection.
por_hnf_cfg_slcsf_dbgrd_u_hnf_nid400x0000500B8064woWrite-only0x00000000Controls access modes for SLC tasg, SLC data, and SF tag debug read.
por_hnf_slc_cache_access_slc_tag_u_hnf_nid400x0000500B8864mixedMixed types. See bit-field details.0x00000000Contains SLC tag debug read data.
por_hnf_slc_cache_access_slc_data_u_hnf_nid400x0000500B9064roRead-only0x00000000Contains SLC data RAM debug read data.
por_hnf_slc_cache_access_sf_tag_u_hnf_nid400x0000500B9864roRead-only0x00000000Contains SF tag debug read data. Bits[63:0]
por_hnf_slc_lock_ways_u_hnf_nid400x0000500C0064mixedMixed types. See bit-field details.0x00000200Controls SLC way lock settings.
por_hnf_slc_lock_base0_u_hnf_nid400x0000500C0864mixedMixed types. See bit-field details.0x00000000Functions as the base register for lock region 0 [47:0].
por_hnf_slc_lock_base1_u_hnf_nid400x0000500C1064mixedMixed types. See bit-field details.0x00000000Functions as the base register for lock region 1 [47:0].
por_hnf_slc_lock_base2_u_hnf_nid400x0000500C1864mixedMixed types. See bit-field details.0x00000000Functions as the base register for lock region 2 [47:0].
por_hnf_slc_lock_base3_u_hnf_nid400x0000500C2064mixedMixed types. See bit-field details.0x00000000Functions as the base register for lock region 3 [47:0].
por_hnf_rni_region_vec_u_hnf_nid400x0000500C3064mixedMixed types. See bit-field details.0x00000000Functions as the control register for RN-I source SLC way allocation.
por_hnf_rnf_region_vec_u_hnf_nid400x0000500C3864rwNormal read/write0x00000000Functions as the control register for RN-F source SLC way allocation.
por_hnf_rnd_region_vec_u_hnf_nid400x0000500C4064mixedMixed types. See bit-field details.0x00000000Functions as the control register for RN-D source SLC way allocation.
por_hnf_sam_control_u_hnf_nid400x0000500D0064mixedMixed types. See bit-field details.0x00000000Configures HN-F SAM. All top_address_bit fields must be between bits 47 and 28 of the address. top_address_bit2 > top_address_bit1 > top_address_bit0. Must be configured to match corresponding por_rnsam_sys_cache_grp_sn_sam_cfgN register in the RN SAM.
por_hnf_sam_memregion0_u_hnf_nid400x0000500D0864mixedMixed types. See bit-field details.0x00000000Configures range-based memory region 0 in HN-F SAM.
por_hnf_sam_memregion1_u_hnf_nid400x0000500D1064mixedMixed types. See bit-field details.0x00000000Configures range-based memory region 1 in HN-F SAM.
por_hnf_sam_sn_properties_u_hnf_nid400x0000500D1864mixedMixed types. See bit-field details.0x00000000Configures properties for all six SN targets and two range-based SN targets.
por_hnf_sam_6sn_nodeid_u_hnf_nid400x0000500D2064mixedMixed types. See bit-field details.0x00000000Configures node IDs for slave nodes 3 to 5 in 6-SN configuration mode.
por_hnf_rn_phys_id0_u_hnf_nid400x0000500D2864mixedMixed types. See bit-field details.0x8000004C80000040Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id1_u_hnf_nid400x0000500D3064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id2_u_hnf_nid400x0000500D3864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id3_u_hnf_nid400x0000500D4064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id4_u_hnf_nid400x0000500D4864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id5_u_hnf_nid400x0000500D5064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id6_u_hnf_nid400x0000500D5864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id7_u_hnf_nid400x0000500D6064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id8_u_hnf_nid400x0000500D6864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id9_u_hnf_nid400x0000500D7064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id10_u_hnf_nid400x0000500D7864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id11_u_hnf_nid400x0000500D8064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id12_u_hnf_nid400x0000500D8864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id13_u_hnf_nid400x0000500D9064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id14_u_hnf_nid400x0000500D9864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id15_u_hnf_nid400x0000500DA064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id16_u_hnf_nid400x0000500DA864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id17_u_hnf_nid400x0000500DB064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id18_u_hnf_nid400x0000500DB864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id19_u_hnf_nid400x0000500DC064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id20_u_hnf_nid400x0000500DC864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id21_u_hnf_nid400x0000500DD064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id22_u_hnf_nid400x0000500DD864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id23_u_hnf_nid400x0000500DE064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id24_u_hnf_nid400x0000500DE864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id25_u_hnf_nid400x0000500DF064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id26_u_hnf_nid400x0000500DF864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id27_u_hnf_nid400x0000500E0064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id28_u_hnf_nid400x0000500E0864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id29_u_hnf_nid400x0000500E1064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id30_u_hnf_nid400x0000500E1864mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_rn_phys_id31_u_hnf_nid400x0000500E2064mixedMixed types. See bit-field details.0x00000000Configures node IDs for RNs in the system corresponding to each RN ID.
por_hnf_sf_cxg_blocked_ways_u_hnf_nid400x0000500F0064mixedMixed types. See bit-field details.0x00000000Specifies the SF ways that are blocked for remote chip to use in CML mode.
por_hnf_cml_port_aggr_grp0_add_mask_u_hnf_nid400x0000500F1064mixedMixed types. See bit-field details.0x00000040Configures the CCIX port aggregation address mask for group 0.
por_hnf_cml_port_aggr_grp1_add_mask_u_hnf_nid400x0000500F1864mixedMixed types. See bit-field details.0x00000040Configures the CCIX port aggregation address mask for group 1.
por_hnf_cml_port_aggr_grp0_reg_u_hnf_nid400x0000500F2864mixedMixed types. See bit-field details.0x00000000Configures the CCIX port aggregation port IDs for group 0.
por_hnf_cml_port_aggr_grp1_reg_u_hnf_nid400x0000500F3064mixedMixed types. See bit-field details.0x00000000Configures the CCIX port aggregation port IDs for group 1.
por_hnf_ppu_pwpr_u_hnf_nid400x000050100032mixedMixed types. See bit-field details.0x00000000Functions as the power policy register for HN-F.
por_hnf_ppu_pwsr_u_hnf_nid400x000050100832mixedMixed types. See bit-field details.0x00000038Provides power status information for HN-F.
por_hnf_ppu_misr_u_hnf_nid400x000050101432mixedMixed types. See bit-field details.0x00000000Functions as the power miscellaneous input current status register for HN-F.
por_hnf_ppu_dyn_ret_threshold_u_hnf_nid400x000050110064mixedMixed types. See bit-field details.0x00000000Configures the dynamic retention threshold for SLC and SF RAM.
por_hnf_ppu_idr0_u_hnf_nid400x0000501FB032mixedMixed types. See bit-field details.0x0801A540Provides identification information for the HN-F PPU.
por_hnf_ppu_idr1_u_hnf_nid400x0000501FB432mixedMixed types. See bit-field details.0x00000000Provides identification information for the HN-F PPU.
por_hnf_ppu_iidr_u_hnf_nid400x0000501FC832roRead-only0x4340043BFunctions as the power implementation identification register for HN-F.
por_hnf_ppu_aidr_u_hnf_nid400x0000501FCC32mixedMixed types. See bit-field details.0x00000011Functions as the power architecture identification register for HN-F.
por_hnf_pmu_event_sel_u_hnf_nid400x000050200064mixedMixed types. See bit-field details.0x00000000Specifies the PMU event to be counted.
por_hnf_errfr_u_hnf_nid400x000050300064mixedMixed types. See bit-field details.0x000048A5Functions as the error feature register.
por_hnf_errctlr_u_hnf_nid400x000050300864mixedMixed types. See bit-field details.0x00000000Functions as the error control register. Controls whether specific error-handling interrupts and error detection/deferment are enabled.
por_hnf_errstatus_u_hnf_nid400x000050301064mixedMixed types. See bit-field details.0x00000000Functions as the error status register. AV and MV bits must be cleared in the same cycle, otherwise the error record does not have a consistent view.
por_hnf_erraddr_u_hnf_nid400x000050301864mixedMixed types. See bit-field details.0x00000000Contains the error record address.
por_hnf_errmisc_u_hnf_nid400x000050302064mixedMixed types. See bit-field details.0x00000000Functions as the miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors.
por_hnf_err_inj_u_hnf_nid400x000050303064mixedMixed types. See bit-field details.0x00000000Enables error injection and setup. When enabled for a given source ID and logic processor ID, HN-F returns a slave error and reports an error interrupt. This error interrupt emulates a SLC double-bit data ECC error. This feature enables software to test the error handler. The slave error is reported for cacheable read access for which SLC hit is the data source. No slave error or error interrupt is reported for cacheable read access in which SLC miss is the data source.
por_hnf_errfr_NS_u_hnf_nid400x000050310064mixedMixed types. See bit-field details.0x000048A5Functions as the non-secure error feature register.
por_hnf_errctlr_NS_u_hnf_nid400x000050310864mixedMixed types. See bit-field details.0x00000000Functions as the non-secure error control register. Controls whether specific error-handling interrupts and error detection/deferment are enabled.
por_hnf_errstatus_NS_u_hnf_nid400x000050311064mixedMixed types. See bit-field details.0x00000000Functions as the non-secure error status register. AV and MV bits must be cleared in the same cycle, otherwise the error record does not have a consistent view.
por_hnf_erraddr_NS_u_hnf_nid400x000050311864mixedMixed types. See bit-field details.0x00000000Contains the non-secure error record address.
por_hnf_errmisc_NS_u_hnf_nid400x000050312064mixedMixed types. See bit-field details.0x00000000Functions as the non-secure miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors.
por_sbsx_node_info_u_sbsx_nid440x000050400064mixedMixed types. See bit-field details.0x1002C0007Provides component identification information.
por_sbsx_child_info_u_sbsx_nid440x000050408064mixedMixed types. See bit-field details.0x00000000Provides component child identification information.
por_sbsx_unit_info_u_sbsx_nid440x000050490064mixedMixed types. See bit-field details.0x00104010Provides component identification information for SBSX.
por_sbsx_aux_ctl_u_sbsx_nid440x0000504A0864mixedMixed types. See bit-field details.0x00000000Functions as the auxiliary control register for the SBSX bridge.
por_sbsx_pmu_event_sel_u_sbsx_nid440x000050600064mixedMixed types. See bit-field details.0x00000000Specifies the PMU event to be counted.
por_mxp_node_info_u_smxp_1_10x000050800064mixedMixed types. See bit-field details.0x400280006Provides component identification information.
por_mxp_device_port_connect_info_p0_u_smxp_1_10x000050800864mixedMixed types. See bit-field details.0x0001000EContains device port connection information for port 0.
por_mxp_device_port_connect_info_p1_u_smxp_1_10x000050801064mixedMixed types. See bit-field details.0x0000000DContains device port connection information for port 1.
por_mxp_mesh_port_connect_info_east_u_smxp_1_10x000050801864mixedMixed types. See bit-field details.0x00000000Contains port connection information for East port.
por_mxp_mesh_port_connect_info_north_u_smxp_1_10x000050802064mixedMixed types. See bit-field details.0x00000000Contains port connection information for North port.
por_mxp_child_info_u_smxp_1_10x000050808064mixedMixed types. See bit-field details.0x01000002Provides component child identification information.
por_mxp_child_pointer_0_u_smxp_1_10x000050810064mixedMixed types. See bit-field details.0x00504000Contains base address of the configuration slave for child 0.
por_mxp_child_pointer_1_u_smxp_1_10x000050810864mixedMixed types. See bit-field details.0x00500000Contains base address of the configuration slave for child 1.
por_mxp_child_pointer_2_u_smxp_1_10x000050811064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 2.
por_mxp_child_pointer_3_u_smxp_1_10x000050811864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 3.
por_mxp_child_pointer_4_u_smxp_1_10x000050812064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 4.
por_mxp_child_pointer_5_u_smxp_1_10x000050812864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 5.
por_mxp_child_pointer_6_u_smxp_1_10x000050813064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 6.
por_mxp_child_pointer_7_u_smxp_1_10x000050813864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 7.
por_mxp_child_pointer_8_u_smxp_1_10x000050814064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 8.
por_mxp_child_pointer_9_u_smxp_1_10x000050814864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 9.
por_mxp_child_pointer_10_u_smxp_1_10x000050815064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 10.
por_mxp_child_pointer_11_u_smxp_1_10x000050815864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 11.
por_mxp_child_pointer_12_u_smxp_1_10x000050816064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 12.
por_mxp_child_pointer_13_u_smxp_1_10x000050816864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 13.
por_mxp_child_pointer_14_u_smxp_1_10x000050817064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 14.
por_mxp_child_pointer_15_u_smxp_1_10x000050817864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 15.
por_mxp_p0_info_u_smxp_1_10x000050890064mixedMixed types. See bit-field details.0x00000211Provides component identification information for XP port 0.
por_mxp_p1_info_u_smxp_1_10x000050890864mixedMixed types. See bit-field details.0x00000211Provides component identification information for XP port 1.
por_mxp_secure_register_groups_override_u_smxp_1_10x000050898064mixedMixed types. See bit-field details.0x00000000Allows non-secure access to predefined groups of secure registers.
por_mxp_aux_ctl_u_smxp_1_10x0000508A0064mixedMixed types. See bit-field details.0x00000000Functions as the auxiliary control register for XP.
por_mxp_p0_qos_control_u_smxp_1_10x0000508A8064mixedMixed types. See bit-field details.0x00000000Controls QoS settings for devices connected to port 0.
por_mxp_p0_qos_lat_tgt_u_smxp_1_10x0000508A8864mixedMixed types. See bit-field details.0x00000000Controls QoS target latency/period (in cycles) for regulation of devices connected to port 0.
por_mxp_p0_qos_lat_scale_u_smxp_1_10x0000508A9064mixedMixed types. See bit-field details.0x00000000Controls the QoS target scale factor for devices connected to port 0. The scale factor is represented in powers of two from the range 2^(-3) to 2^(-10).
por_mxp_p0_qos_lat_range_u_smxp_1_10x0000508A9864mixedMixed types. See bit-field details.0x00000000Controls the minimum and maximum QoS values generated by the QoS regulator for devices connected to port 0.
por_mxp_p1_qos_control_u_smxp_1_10x0000508AA064mixedMixed types. See bit-field details.0x00000000Controls QoS settings for devices connected to port 1.
por_mxp_p1_qos_lat_tgt_u_smxp_1_10x0000508AA864mixedMixed types. See bit-field details.0x00000000Controls QoS target latency/period (in cycles) for regulation of devices connected to port 1.
por_mxp_p1_qos_lat_scale_u_smxp_1_10x0000508AB064mixedMixed types. See bit-field details.0x00000000Controls the QoS target scale factor for devices connected to port 1. The scale factor is represented in powers of two from the range 2^(-3) to 2^(-10).
por_mxp_p1_qos_lat_range_u_smxp_1_10x0000508AB864mixedMixed types. See bit-field details.0x00000000Controls the minimum and maximum QoS values generated by the QoS regulator for devices connected to port 1.
por_mxp_p0_syscoreq_ctl_u_smxp_1_10x000050900064mixedMixed types. See bit-field details.0x00000000Functions as the port 0 snoop and DVM domain control register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p0_syscoack_status. NOTE: Only valid on RN-F ports.
por_mxp_p1_syscoreq_ctl_u_smxp_1_10x000050900864mixedMixed types. See bit-field details.0x00000000Functions as the port 1 snoop and DVM domain control register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p1_syscoack_status. NOTE: Only valid on RN-F ports.
por_mxp_p0_syscoack_status_u_smxp_1_10x000050901064mixedMixed types. See bit-field details.0x00000000Functions as the port 0 snoop and DVM domain status register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p0_syscoreq_ctl. NOTE: Only valid on RN-F ports.
por_mxp_p1_syscoack_status_u_smxp_1_10x000050901864mixedMixed types. See bit-field details.0x00000000Functions as the port 1 snoop and DVM domain status register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p1_syscoreq_ctl. NOTE: Only valid on RN-F ports.
por_mxp_pmu_event_sel_u_smxp_1_10x000050A00064mixedMixed types. See bit-field details.0x00000000Specifies the PMU event to be counted.
por_dtm_control_u_smxp_1_10x000050A10064mixedMixed types. See bit-field details.0x00000000Functions as the DTM control register.
por_dtm_fifo_entry_ready_u_smxp_1_10x000050A11864mixedMixed types. See bit-field details.0x00000000Controls status of DTM FIFO entries.
por_dtm_fifo_entry0_0_u_smxp_1_10x000050A12064roRead-only0x00000000Contains DTM FIFO entry 0 data.
por_dtm_fifo_entry0_1_u_smxp_1_10x000050A12864roRead-only0x00000000Contains DTM FIFO entry 0 data.
por_dtm_fifo_entry0_2_u_smxp_1_10x000050A13064mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 0 data.
por_dtm_fifo_entry1_0_u_smxp_1_10x000050A13864roRead-only0x00000000Contains DTM FIFO entry 1 data.
por_dtm_fifo_entry1_1_u_smxp_1_10x000050A14064roRead-only0x00000000Contains DTM FIFO entry 1 data.
por_dtm_fifo_entry1_2_u_smxp_1_10x000050A14864mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 1 data.
por_dtm_fifo_entry2_0_u_smxp_1_10x000050A15064roRead-only0x00000000Contains DTM FIFO entry 2 data.
por_dtm_fifo_entry2_1_u_smxp_1_10x000050A15864roRead-only0x00000000Contains DTM FIFO entry 2 data.
por_dtm_fifo_entry2_2_u_smxp_1_10x000050A16064mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 2 data.
por_dtm_fifo_entry3_0_u_smxp_1_10x000050A16864roRead-only0x00000000Contains DTM FIFO entry 3 data.
por_dtm_fifo_entry3_1_u_smxp_1_10x000050A17064roRead-only0x00000000Contains DTM FIFO entry 3 data.
por_dtm_fifo_entry3_2_u_smxp_1_10x000050A17864mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 3 data.
por_dtm_wp0_config_u_smxp_1_10x000050A1A064mixedMixed types. See bit-field details.0x00000000Configures watchpoint 0.
por_dtm_wp0_val_u_smxp_1_10x000050A1A864rwNormal read/write0x00000000Configures watchpoint 0 comparison value.
por_dtm_wp0_mask_u_smxp_1_10x000050A1B064rwNormal read/write0x00000000Configures watchpoint0 comparison mask.
por_dtm_wp1_config_u_smxp_1_10x000050A1B864mixedMixed types. See bit-field details.0x00000000Configures watchpoint 1.
por_dtm_wp1_val_u_smxp_1_10x000050A1C064rwNormal read/write0x00000000Configures watchpoint 1 comparison value.
por_dtm_wp1_mask_u_smxp_1_10x000050A1C864rwNormal read/write0x00000000Configures watchpoint 1 comparison mask.
por_dtm_wp2_config_u_smxp_1_10x000050A1D064mixedMixed types. See bit-field details.0x00000000Configures watchpoint 2.
por_dtm_wp2_val_u_smxp_1_10x000050A1D864rwNormal read/write0x00000000Configures watchpoint 2 comparison value.
por_dtm_wp2_mask_u_smxp_1_10x000050A1E064rwNormal read/write0x00000000Configures watchpoint 2 comparison mask.
por_dtm_wp3_config_u_smxp_1_10x000050A1E864mixedMixed types. See bit-field details.0x00000000Configures watchpoint 3.
por_dtm_wp3_val_u_smxp_1_10x000050A1F064rwNormal read/write0x00000000Configures watchpoint 3 comparison value.
por_dtm_wp3_mask_u_smxp_1_10x000050A1F864rwNormal read/write0x00000000Configures watchpoint 3 comparison mask.
por_dtm_pmsicr_u_smxp_1_10x000050A20064mixedMixed types. See bit-field details.0x00000000Functions as the sampling interval counter register.
por_dtm_pmsirr_u_smxp_1_10x000050A20864mixedMixed types. See bit-field details.0x00000000Functions as the sampling interval reload register.
por_dtm_pmu_config_u_smxp_1_10x000050A21064mixedMixed types. See bit-field details.0x00000000Configures the DTM PMU.
por_dtm_pmevcnt_u_smxp_1_10x000050A22064rwNormal read/write0x00000000Contains all PMU event counters (0, 1, 2, 3).
por_dtm_pmevcntsr_u_smxp_1_10x000050A24064rwNormal read/write0x00000000Functions as the PMU event counter shadow register for all counters (0, 1, 2, 3).
por_mxp_errfr_u_smxp_1_10x000050B00064mixedMixed types. See bit-field details.0x000000A1Functions as the error feature register.
por_mxp_errctlr_u_smxp_1_10x000050B00864mixedMixed types. See bit-field details.0x00000000Functions as the error control register. Controls whether specific error-handling interrupts and error detection/deferment are enabled.
por_mxp_errstatus_u_smxp_1_10x000050B01064mixedMixed types. See bit-field details.0x00000000Functions as the error status register. AV and MV bits must be cleared in the same cycle, otherwise the error record does not have a consistent view.
por_mxp_errmisc_u_smxp_1_10x000050B02864mixedMixed types. See bit-field details.0x00000000Functions as the miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors.
por_mxp_errfr_NS_u_smxp_1_10x000050B10064mixedMixed types. See bit-field details.0x000000A1Functions as the non-secure error feature register.
por_mxp_errctlr_NS_u_smxp_1_10x000050B10864mixedMixed types. See bit-field details.0x00000000Functions as the non-secure error control register. Controls whether specific error-handling interrupts and error detection/deferment are enabled.
por_mxp_errstatus_NS_u_smxp_1_10x000050B11064mixedMixed types. See bit-field details.0x00000000Functions as the non-secure error status register.
por_mxp_errmisc_NS_u_smxp_1_10x000050B12864mixedMixed types. See bit-field details.0x00000000Functions as the non-secure miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors.
por_cxg_ra_node_info_u_cxrh_nid680x000080400064mixedMixed types. See bit-field details.0x00440100Provides component identification information.
por_cxg_ra_child_info_u_cxrh_nid680x000080408064mixedMixed types. See bit-field details.0x00000000Provides component child identification information.
por_cxg_ra_unit_info_u_cxrh_nid680x000080490064mixedMixed types. See bit-field details.0x204006021000008Provides component identification information for CXRA.
por_cxg_ra_secure_register_groups_override_u_cxrh_nid680x000080498064mixedMixed types. See bit-field details.0x00000000Allows non-secure access to predefined groups of secure registers.
por_cxg_ra_cfg_ctl_u_cxrh_nid680x0000804A0064mixedMixed types. See bit-field details.0x00000002Functions as the configuration control register. Specifies the current mode.
por_cxg_ra_aux_ctl_u_cxrh_nid680x0000804A0864mixedMixed types. See bit-field details.0x00000006Functions as the auxiliary control register for CXRA.
por_cxg_ra_sam_addr_region_reg0_u_cxrh_nid680x0000804DA864mixedMixed types. See bit-field details.0x00000000Configures Address Region 0 for RA SAM.
por_cxg_ra_sam_addr_region_reg1_u_cxrh_nid680x0000804DB064mixedMixed types. See bit-field details.0x00000000Configures Address Region 1 for RA SAM.
por_cxg_ra_sam_addr_region_reg2_u_cxrh_nid680x0000804DB864mixedMixed types. See bit-field details.0x00000000Configures Address Region 2 for RA SAM.
por_cxg_ra_sam_addr_region_reg3_u_cxrh_nid680x0000804DC064mixedMixed types. See bit-field details.0x00000000Configures Address Region 3 for RA SAM.
por_cxg_ra_sam_addr_region_reg4_u_cxrh_nid680x0000804DC864mixedMixed types. See bit-field details.0x00000000Configures Address Region 4 for RA SAM.
por_cxg_ra_sam_addr_region_reg5_u_cxrh_nid680x0000804DD064mixedMixed types. See bit-field details.0x00000000Configures Address Region 5 for RA SAM.
por_cxg_ra_sam_addr_region_reg6_u_cxrh_nid680x0000804DD864mixedMixed types. See bit-field details.0x00000000Configures Address Region 6 for RA SAM.
por_cxg_ra_sam_addr_region_reg7_u_cxrh_nid680x0000804DE064mixedMixed types. See bit-field details.0x00000000Configures Address Region 7 for RA SAM.
por_cxg_ra_agentid_to_linkid_reg0_u_cxrh_nid680x0000804E6064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 0 to 7.
por_cxg_ra_agentid_to_linkid_reg1_u_cxrh_nid680x0000804E6864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 8 to 15.
por_cxg_ra_agentid_to_linkid_reg2_u_cxrh_nid680x0000804E7064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 16 to 23.
por_cxg_ra_agentid_to_linkid_reg3_u_cxrh_nid680x0000804E7864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 24 to 31.
por_cxg_ra_agentid_to_linkid_reg4_u_cxrh_nid680x0000804E8064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 32 to 39.
por_cxg_ra_agentid_to_linkid_reg5_u_cxrh_nid680x0000804E8864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 40 to 47.
por_cxg_ra_agentid_to_linkid_reg6_u_cxrh_nid680x0000804E9064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 48 to 55.
por_cxg_ra_agentid_to_linkid_reg7_u_cxrh_nid680x0000804E9864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 56 to 63.
por_cxg_ra_rnf_ldid_to_raid_reg0_u_cxrh_nid680x0000804EA064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of RN-F LDID to RAID for LDIDs 0 to 7.
por_cxg_ra_rni_ldid_to_raid_reg0_u_cxrh_nid680x0000804EE064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of RN-I LDID to RAID for LDIDs 0 to 7.
por_cxg_ra_agentid_to_linkid_val_u_cxrh_nid680x0000804F2064rwNormal read/write0x00000000Specifies which Agent ID to Link ID mappings are valid.
por_cxg_ra_rnf_ldid_to_raid_val_u_cxrh_nid680x0000804F2864rwNormal read/write0x00000000Specifies which RN-F LDID to RAID mappings are valid.
por_cxg_ra_rni_ldid_to_raid_val_u_cxrh_nid680x0000804F3064mixedMixed types. See bit-field details.0x00000000Specifies which RN-I LDID to RAID mappings are valid.
por_cxg_ra_rnd_ldid_to_raid_val_u_cxrh_nid680x0000804F3864mixedMixed types. See bit-field details.0x00000000Specifies which RN-D LDID to RAID mappings are valid.
por_cxg_ra_cxprtcl_link0_ctl_u_cxrh_nid680x000080500064mixedMixed types. See bit-field details.0x00000000Functions as the CXRA CCIX Protocol Link 0 control register. Works with por_cxg_ra_cxprtcl_link0_status.
por_cxg_ra_cxprtcl_link0_status_u_cxrh_nid680x000080500864mixedMixed types. See bit-field details.0x00000002Functions as the CXRA CCIX Protocol Link 0 status register. Works with por_cxg_ra_cxprtcl_link0_ctl.
por_cxg_ra_cxprtcl_link1_ctl_u_cxrh_nid680x000080501064mixedMixed types. See bit-field details.0x00000000Functions as the CXRA CCIX Protocol Link 1 control register. Works with por_cxg_ra_cxprtcl_link1_status.
por_cxg_ra_cxprtcl_link1_status_u_cxrh_nid680x000080501864mixedMixed types. See bit-field details.0x00000002Functions as the CXRA CCIX Protocol Link 1 status register. Works with por_cxg_ra_cxprtcl_link1_ctl.
por_cxg_ra_cxprtcl_link2_ctl_u_cxrh_nid680x000080502064mixedMixed types. See bit-field details.0x00000000Functions as the CXRA CCIX Protocol Link 2 control register. Works with por_cxg_ra_cxprtcl_link2_status.
por_cxg_ra_cxprtcl_link2_status_u_cxrh_nid680x000080502864mixedMixed types. See bit-field details.0x00000002Functions as the CXRA CCIX Protocol Link 2 status register. Works with por_cxg_ra_cxprtcl_link2_ctl.
por_cxg_ra_pmu_event_sel_u_cxrh_nid680x000080600064mixedMixed types. See bit-field details.0x00000000Specifies the PMU event to be counted.
por_mxp_node_info_u_smxp_2_00x000080800064mixedMixed types. See bit-field details.0x200400006Provides component identification information.
por_mxp_device_port_connect_info_p0_u_smxp_2_00x000080800864mixedMixed types. See bit-field details.0x00010005Contains device port connection information for port 0.
por_mxp_device_port_connect_info_p1_u_smxp_2_00x000080801064mixedMixed types. See bit-field details.0x00000013Contains device port connection information for port 1.
por_mxp_mesh_port_connect_info_east_u_smxp_2_00x000080801864mixedMixed types. See bit-field details.0x00000000Contains port connection information for East port.
por_mxp_mesh_port_connect_info_north_u_smxp_2_00x000080802064mixedMixed types. See bit-field details.0x00000000Contains port connection information for North port.
por_mxp_child_info_u_smxp_2_00x000080808064mixedMixed types. See bit-field details.0x01000005Provides component child identification information.
por_mxp_child_pointer_0_u_smxp_2_00x000080810064mixedMixed types. See bit-field details.0x80824000Contains base address of the configuration slave for child 0.
por_mxp_child_pointer_1_u_smxp_2_00x000080810864mixedMixed types. See bit-field details.0x00854000Contains base address of the configuration slave for child 1.
por_mxp_child_pointer_2_u_smxp_2_00x000080811064mixedMixed types. See bit-field details.0x00814000Contains base address of the configuration slave for child 2.
por_mxp_child_pointer_3_u_smxp_2_00x000080811864mixedMixed types. See bit-field details.0x00804000Contains base address of the configuration slave for child 3.
por_mxp_child_pointer_4_u_smxp_2_00x000080812064mixedMixed types. See bit-field details.0x00828000Contains base address of the configuration slave for child 4.
por_mxp_child_pointer_5_u_smxp_2_00x000080812864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 5.
por_mxp_child_pointer_6_u_smxp_2_00x000080813064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 6.
por_mxp_child_pointer_7_u_smxp_2_00x000080813864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 7.
por_mxp_child_pointer_8_u_smxp_2_00x000080814064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 8.
por_mxp_child_pointer_9_u_smxp_2_00x000080814864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 9.
por_mxp_child_pointer_10_u_smxp_2_00x000080815064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 10.
por_mxp_child_pointer_11_u_smxp_2_00x000080815864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 11.
por_mxp_child_pointer_12_u_smxp_2_00x000080816064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 12.
por_mxp_child_pointer_13_u_smxp_2_00x000080816864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 13.
por_mxp_child_pointer_14_u_smxp_2_00x000080817064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 14.
por_mxp_child_pointer_15_u_smxp_2_00x000080817864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 15.
por_mxp_p0_info_u_smxp_2_00x000080890064mixedMixed types. See bit-field details.0x00000491Provides component identification information for XP port 0.
por_mxp_p1_info_u_smxp_2_00x000080890864mixedMixed types. See bit-field details.0x00000211Provides component identification information for XP port 1.
por_mxp_secure_register_groups_override_u_smxp_2_00x000080898064mixedMixed types. See bit-field details.0x00000000Allows non-secure access to predefined groups of secure registers.
por_mxp_aux_ctl_u_smxp_2_00x0000808A0064mixedMixed types. See bit-field details.0x00000000Functions as the auxiliary control register for XP.
por_mxp_p0_qos_control_u_smxp_2_00x0000808A8064mixedMixed types. See bit-field details.0x00000000Controls QoS settings for devices connected to port 0.
por_mxp_p0_qos_lat_tgt_u_smxp_2_00x0000808A8864mixedMixed types. See bit-field details.0x00000000Controls QoS target latency/period (in cycles) for regulation of devices connected to port 0.
por_mxp_p0_qos_lat_scale_u_smxp_2_00x0000808A9064mixedMixed types. See bit-field details.0x00000000Controls the QoS target scale factor for devices connected to port 0. The scale factor is represented in powers of two from the range 2^(-3) to 2^(-10).
por_mxp_p0_qos_lat_range_u_smxp_2_00x0000808A9864mixedMixed types. See bit-field details.0x00000000Controls the minimum and maximum QoS values generated by the QoS regulator for devices connected to port 0.
por_mxp_p1_qos_control_u_smxp_2_00x0000808AA064mixedMixed types. See bit-field details.0x00000000Controls QoS settings for devices connected to port 1.
por_mxp_p1_qos_lat_tgt_u_smxp_2_00x0000808AA864mixedMixed types. See bit-field details.0x00000000Controls QoS target latency/period (in cycles) for regulation of devices connected to port 1.
por_mxp_p1_qos_lat_scale_u_smxp_2_00x0000808AB064mixedMixed types. See bit-field details.0x00000000Controls the QoS target scale factor for devices connected to port 1. The scale factor is represented in powers of two from the range 2^(-3) to 2^(-10).
por_mxp_p1_qos_lat_range_u_smxp_2_00x0000808AB864mixedMixed types. See bit-field details.0x00000000Controls the minimum and maximum QoS values generated by the QoS regulator for devices connected to port 1.
por_mxp_p0_syscoreq_ctl_u_smxp_2_00x000080900064mixedMixed types. See bit-field details.0x00000000Functions as the port 0 snoop and DVM domain control register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p0_syscoack_status. NOTE: Only valid on RN-F ports.
por_mxp_p1_syscoreq_ctl_u_smxp_2_00x000080900864mixedMixed types. See bit-field details.0x00000000Functions as the port 1 snoop and DVM domain control register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p1_syscoack_status. NOTE: Only valid on RN-F ports.
por_mxp_p0_syscoack_status_u_smxp_2_00x000080901064mixedMixed types. See bit-field details.0x00000000Functions as the port 0 snoop and DVM domain status register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p0_syscoreq_ctl. NOTE: Only valid on RN-F ports.
por_mxp_p1_syscoack_status_u_smxp_2_00x000080901864mixedMixed types. See bit-field details.0x00000000Functions as the port 1 snoop and DVM domain status register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p1_syscoreq_ctl. NOTE: Only valid on RN-F ports.
por_mxp_pmu_event_sel_u_smxp_2_00x000080A00064mixedMixed types. See bit-field details.0x00000000Specifies the PMU event to be counted.
por_dtm_control_u_smxp_2_00x000080A10064mixedMixed types. See bit-field details.0x00000000Functions as the DTM control register.
por_dtm_fifo_entry_ready_u_smxp_2_00x000080A11864mixedMixed types. See bit-field details.0x00000000Controls status of DTM FIFO entries.
por_dtm_fifo_entry0_0_u_smxp_2_00x000080A12064roRead-only0x00000000Contains DTM FIFO entry 0 data.
por_dtm_fifo_entry0_1_u_smxp_2_00x000080A12864roRead-only0x00000000Contains DTM FIFO entry 0 data.
por_dtm_fifo_entry0_2_u_smxp_2_00x000080A13064mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 0 data.
por_dtm_fifo_entry1_0_u_smxp_2_00x000080A13864roRead-only0x00000000Contains DTM FIFO entry 1 data.
por_dtm_fifo_entry1_1_u_smxp_2_00x000080A14064roRead-only0x00000000Contains DTM FIFO entry 1 data.
por_dtm_fifo_entry1_2_u_smxp_2_00x000080A14864mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 1 data.
por_dtm_fifo_entry2_0_u_smxp_2_00x000080A15064roRead-only0x00000000Contains DTM FIFO entry 2 data.
por_dtm_fifo_entry2_1_u_smxp_2_00x000080A15864roRead-only0x00000000Contains DTM FIFO entry 2 data.
por_dtm_fifo_entry2_2_u_smxp_2_00x000080A16064mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 2 data.
por_dtm_fifo_entry3_0_u_smxp_2_00x000080A16864roRead-only0x00000000Contains DTM FIFO entry 3 data.
por_dtm_fifo_entry3_1_u_smxp_2_00x000080A17064roRead-only0x00000000Contains DTM FIFO entry 3 data.
por_dtm_fifo_entry3_2_u_smxp_2_00x000080A17864mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 3 data.
por_dtm_wp0_config_u_smxp_2_00x000080A1A064mixedMixed types. See bit-field details.0x00000000Configures watchpoint 0.
por_dtm_wp0_val_u_smxp_2_00x000080A1A864rwNormal read/write0x00000000Configures watchpoint 0 comparison value.
por_dtm_wp0_mask_u_smxp_2_00x000080A1B064rwNormal read/write0x00000000Configures watchpoint0 comparison mask.
por_dtm_wp1_config_u_smxp_2_00x000080A1B864mixedMixed types. See bit-field details.0x00000000Configures watchpoint 1.
por_dtm_wp1_val_u_smxp_2_00x000080A1C064rwNormal read/write0x00000000Configures watchpoint 1 comparison value.
por_dtm_wp1_mask_u_smxp_2_00x000080A1C864rwNormal read/write0x00000000Configures watchpoint 1 comparison mask.
por_dtm_wp2_config_u_smxp_2_00x000080A1D064mixedMixed types. See bit-field details.0x00000000Configures watchpoint 2.
por_dtm_wp2_val_u_smxp_2_00x000080A1D864rwNormal read/write0x00000000Configures watchpoint 2 comparison value.
por_dtm_wp2_mask_u_smxp_2_00x000080A1E064rwNormal read/write0x00000000Configures watchpoint 2 comparison mask.
por_dtm_wp3_config_u_smxp_2_00x000080A1E864mixedMixed types. See bit-field details.0x00000000Configures watchpoint 3.
por_dtm_wp3_val_u_smxp_2_00x000080A1F064rwNormal read/write0x00000000Configures watchpoint 3 comparison value.
por_dtm_wp3_mask_u_smxp_2_00x000080A1F864rwNormal read/write0x00000000Configures watchpoint 3 comparison mask.
por_dtm_pmsicr_u_smxp_2_00x000080A20064mixedMixed types. See bit-field details.0x00000000Functions as the sampling interval counter register.
por_dtm_pmsirr_u_smxp_2_00x000080A20864mixedMixed types. See bit-field details.0x00000000Functions as the sampling interval reload register.
por_dtm_pmu_config_u_smxp_2_00x000080A21064mixedMixed types. See bit-field details.0x00000000Configures the DTM PMU.
por_dtm_pmevcnt_u_smxp_2_00x000080A22064rwNormal read/write0x00000000Contains all PMU event counters (0, 1, 2, 3).
por_dtm_pmevcntsr_u_smxp_2_00x000080A24064rwNormal read/write0x00000000Functions as the PMU event counter shadow register for all counters (0, 1, 2, 3).
por_mxp_errfr_u_smxp_2_00x000080B00064mixedMixed types. See bit-field details.0x000000A1Functions as the error feature register.
por_mxp_errctlr_u_smxp_2_00x000080B00864mixedMixed types. See bit-field details.0x00000000Functions as the error control register. Controls whether specific error-handling interrupts and error detection/deferment are enabled.
por_mxp_errstatus_u_smxp_2_00x000080B01064mixedMixed types. See bit-field details.0x00000000Functions as the error status register. AV and MV bits must be cleared in the same cycle, otherwise the error record does not have a consistent view.
por_mxp_errmisc_u_smxp_2_00x000080B02864mixedMixed types. See bit-field details.0x00000000Functions as the miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors.
por_mxp_errfr_NS_u_smxp_2_00x000080B10064mixedMixed types. See bit-field details.0x000000A1Functions as the non-secure error feature register.
por_mxp_errctlr_NS_u_smxp_2_00x000080B10864mixedMixed types. See bit-field details.0x00000000Functions as the non-secure error control register. Controls whether specific error-handling interrupts and error detection/deferment are enabled.
por_mxp_errstatus_NS_u_smxp_2_00x000080B11064mixedMixed types. See bit-field details.0x00000000Functions as the non-secure error status register.
por_mxp_errmisc_NS_u_smxp_2_00x000080B12864mixedMixed types. See bit-field details.0x00000000Functions as the non-secure miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors.
por_cxg_ha_node_info_u_cxrh_nid680x000081400064mixedMixed types. See bit-field details.0x00440101Provides component identification information.
por_cxg_ha_id_u_cxrh_nid680x000081400864mixedMixed types. See bit-field details.0x00000000Contains the CCIX-assigned HAID.
por_cxg_ha_child_info_u_cxrh_nid680x000081408064mixedMixed types. See bit-field details.0x00000000Provides component child identification information.
por_cxg_ha_unit_info_u_cxrh_nid680x000081490064roRead-only0x4030603018100C0Provides component identification information for CXHA.
por_cxg_ha_secure_register_groups_override_u_cxrh_nid680x000081498064mixedMixed types. See bit-field details.0x00000000Allows non-secure access to predefined groups of secure registers.
por_cxg_ha_aux_ctl_u_cxrh_nid680x0000814A0864mixedMixed types. See bit-field details.0x00000008Functions as the auxiliary control register for CXHA.
por_cxg_ha_rnf_raid_to_ldid_reg0_u_cxrh_nid680x0000814C0064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of RAID to RN-F LDID for RAIDs 0 to 7.
por_cxg_ha_rnf_raid_to_ldid_reg1_u_cxrh_nid680x0000814C0864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of RAID to RN-F LDID for RAIDs 8 to 15.
por_cxg_ha_rnf_raid_to_ldid_reg2_u_cxrh_nid680x0000814C1064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of RAID to RN-F LDID for RAIDs 16 to 23.
por_cxg_ha_rnf_raid_to_ldid_reg3_u_cxrh_nid680x0000814C1864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of RAID to RN-F LDID for RAIDs 24 to 31.
por_cxg_ha_rnf_raid_to_ldid_reg4_u_cxrh_nid680x0000814C2064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of RAID to RN-F LDID for RAIDs 32 to 39.
por_cxg_ha_rnf_raid_to_ldid_reg5_u_cxrh_nid680x0000814C2864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of RAID to RN-F LDID for RAIDs 40 to 47.
por_cxg_ha_rnf_raid_to_ldid_reg6_u_cxrh_nid680x0000814C3064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of RAID to RN-F LDID for RAIDs 48 to 55.
por_cxg_ha_rnf_raid_to_ldid_reg7_u_cxrh_nid680x0000814C3864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of RAID to RN-F LDID for RAIDs 56 to 63.
por_cxg_ha_agentid_to_linkid_reg0_u_cxrh_nid680x0000814C4064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 0 to 7.
por_cxg_ha_agentid_to_linkid_reg1_u_cxrh_nid680x0000814C4864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 8 to 15.
por_cxg_ha_agentid_to_linkid_reg2_u_cxrh_nid680x0000814C5064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 16 to 23.
por_cxg_ha_agentid_to_linkid_reg3_u_cxrh_nid680x0000814C5864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 24 to 31.
por_cxg_ha_agentid_to_linkid_reg4_u_cxrh_nid680x0000814C6064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 32 to 39.
por_cxg_ha_agentid_to_linkid_reg5_u_cxrh_nid680x0000814C6864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 40 to 47.
por_cxg_ha_agentid_to_linkid_reg6_u_cxrh_nid680x0000814C7064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 48 to 55.
por_cxg_ha_agentid_to_linkid_reg7_u_cxrh_nid680x0000814C7864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 56 to 63.
por_cxg_ha_agentid_to_linkid_val_u_cxrh_nid680x0000814D0064rwNormal read/write0x00000000Specifies which Agent ID to Link ID mappings are valid.
por_cxg_ha_rnf_raid_to_ldid_val_u_cxrh_nid680x0000814D0864rwNormal read/write0x00000000Specifies which RAID to RN-F LDID mappings are valid.
por_cxg_ha_cxprtcl_link0_ctl_u_cxrh_nid680x000081500064mixedMixed types. See bit-field details.0x00000000Functions as the CXHA CCIX Protocol Link 0 control register. Works with por_cxg_ha_cxprtcl_link0_status.
por_cxg_ha_cxprtcl_link0_status_u_cxrh_nid680x000081500864mixedMixed types. See bit-field details.0x00000002Functions as the CXHA CCIX Protocol Link 0 status register. Works with por_cxg_ha_cxprtcl_link0_ctl.
por_cxg_ha_cxprtcl_link1_ctl_u_cxrh_nid680x000081501064mixedMixed types. See bit-field details.0x00000000Functions as the CXHA CCIX Protocol Link 1 control register. Works with por_cxg_ha_cxprtcl_link1_status.
por_cxg_ha_cxprtcl_link1_status_u_cxrh_nid680x000081501864mixedMixed types. See bit-field details.0x00000002Functions as the CXHA CCIX Protocol Link 1 status register. Works with por_cxg_ha_cxprtcl_link1_ctl.
por_cxg_ha_cxprtcl_link2_ctl_u_cxrh_nid680x000081502064mixedMixed types. See bit-field details.0x00000000Functions as the CXHA CCIX Protocol Link 2 control register. Works with por_cxg_ha_cxprtcl_link2_status.
por_cxg_ha_cxprtcl_link2_status_u_cxrh_nid680x000081502864mixedMixed types. See bit-field details.0x00000002Functions as the CXHA CCIX Protocol Link 2 status register. Works with por_cxg_ha_cxprtcl_link2_ctl.
por_cxg_ha_pmu_event_sel_u_cxrh_nid680x000081600064mixedMixed types. See bit-field details.0x00000000Specifies the PMU event to be counted as a 6-bit ID with the following encodings: 6b000000: CXHA_PMU_EVENT_NULL 6b100001: CXHA_PMU_EVENT_RDDATBYP 6b100010: CXHA_PMU_EVENT_CHIRSP_UP_STALL 6b100011: CXHA_PMU_EVENT_CHIDAT_UP_STALL 6b100100: CXHA_PMU_EVENT_SNPPCRD_LNK0_STALL 6b100101: CXHA_PMU_EVENT_SNPPCRD_LNK1_STALL 6b100110: CXHA_PMU_EVENT_SNPPCRD_LNK2_STALL 6b100111: CXHA_PMU_EVENT_REQTRK_OCC 6b101000: CXHA_PMU_EVENT_RDB_OCC 6b101001: CXHA_PMU_EVENT_RDBBYP_OCC 6b101010: CXHA_PMU_EVENT_WDB_OCC 6b101011: CXHA_PMU_EVENT_SNPTRK_OCC 6b101100: CXHA_PMU_EVENT_SDB_OCC 6b101101: CXHA_PMU_EVENT_SNPHAZ_OCC
por_cxg_ha_errfr_u_cxrh_nid680x000081700064mixedMixed types. See bit-field details.0x000000A5Functions as the error feature register.
por_cxg_ha_errctlr_u_cxrh_nid680x000081700864mixedMixed types. See bit-field details.0x00000000Functions as the error control register. Controls whether specific error-handling interrupts and error detection/deferment are enabled.
por_cxg_ha_errstatus_u_cxrh_nid680x000081701064mixedMixed types. See bit-field details.0x00000000Functions as the error status register. AV and MV bits must be cleared in the same cycle, otherwise the error record does not have a consistent view.
por_cxg_ha_erraddr_u_cxrh_nid680x000081701864mixedMixed types. See bit-field details.0x00000000Contains the error record address.
por_cxg_ha_errmisc_u_cxrh_nid680x000081702064mixedMixed types. See bit-field details.0x00000000Functions as the miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors.
por_cxg_ha_errfr_NS_u_cxrh_nid680x000081710064mixedMixed types. See bit-field details.0x000000A5Functions as the non-secure error feature register.
por_cxg_ha_errctlr_NS_u_cxrh_nid680x000081710864mixedMixed types. See bit-field details.0x00000000Functions as the non-secure error control register. Controls whether specific error-handling interrupts and error detection/deferment are enabled.
por_cxg_ha_errstatus_NS_u_cxrh_nid680x000081711064mixedMixed types. See bit-field details.0x00000000Functions as the non-secure error status register. AV and MV bits must be cleared in the same cycle, otherwise the error record does not have a consistent view.
por_cxg_ha_erraddr_NS_u_cxrh_nid680x000081711864mixedMixed types. See bit-field details.0x00000000Contains the non-secure error record address.
por_cxg_ha_errmisc_NS_u_cxrh_nid680x000081712064mixedMixed types. See bit-field details.0x00000000Functions as the non-secure miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors.
por_cxla_node_info_u_cxrh_nid680x000082400064mixedMixed types. See bit-field details.0x00440102Provides component identification information.
por_cxla_child_info_u_cxrh_nid680x000082408064mixedMixed types. See bit-field details.0x00000000Provides component child identification information.
por_cxla_unit_info_u_cxrh_nid680x000082490064mixedMixed types. See bit-field details.0x00082207Provides component identification information for CXLA.
por_cxla_secure_register_groups_override_u_cxrh_nid680x000082498064mixedMixed types. See bit-field details.0x00000000Allows non-secure access to predefined groups of secure registers.
por_cxla_aux_ctl_u_cxrh_nid680x0000824A0864mixedMixed types. See bit-field details.0x220000000180Functions as the auxiliary control register for CXLA.
por_cxla_ccix_prop_capabilities_u_cxrh_nid680x0000824C0064mixedMixed types. See bit-field details.0x00000100Contains CCIX-supported properties.
por_cxla_ccix_prop_configured_u_cxrh_nid680x0000824C0864mixedMixed types. See bit-field details.0x00000400Contains CCIX-configured properties.
por_cxla_tx_cxs_attr_capabilities_u_cxrh_nid680x0000824C1064mixedMixed types. See bit-field details.0x00000030Contains TX CXS supported attributes.
por_cxla_rx_cxs_attr_capabilities_u_cxrh_nid680x0000824C1864mixedMixed types. See bit-field details.0x00000020Contains RX CXS supported attributes.
por_cxla_agentid_to_linkid_reg0_u_cxrh_nid680x0000824C3064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 0 to 7.
por_cxla_agentid_to_linkid_reg1_u_cxrh_nid680x0000824C3864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 8 to 15.
por_cxla_agentid_to_linkid_reg2_u_cxrh_nid680x0000824C4064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 16 to 23.
por_cxla_agentid_to_linkid_reg3_u_cxrh_nid680x0000824C4864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 24 to 31.
por_cxla_agentid_to_linkid_reg4_u_cxrh_nid680x0000824C5064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 32 to 39.
por_cxla_agentid_to_linkid_reg5_u_cxrh_nid680x0000824C5864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 40 to 47.
por_cxla_agentid_to_linkid_reg6_u_cxrh_nid680x0000824C6064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 48 to 55.
por_cxla_agentid_to_linkid_reg7_u_cxrh_nid680x0000824C6864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 56 to 63.
por_cxla_agentid_to_linkid_val_u_cxrh_nid680x0000824C7064rwNormal read/write0x00000000Specifies which Agent ID to Link ID mappings are valid.
por_cxla_linkid_to_pcie_bus_num_u_cxrh_nid680x0000824C7864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of CCIX Link ID to PCIe bus number.
por_cxla_tlp_hdr_fields_u_cxrh_nid680x0000824C8064mixedMixed types. See bit-field details.0x7F000072Configures PCIe header field values.
por_cxla_permsg_pyld_0_63_u_cxrh_nid680x0000824D0064rwNormal read/write0x00000000Contains bits[63:0] of CCIX Protocol Error (PER) Message payload.
por_cxla_permsg_pyld_64_127_u_cxrh_nid680x0000824D0864rwNormal read/write0x00000000Contains bits[127:64] of CCIX Protocol Error (PER) Message payload.
por_cxla_permsg_pyld_128_191_u_cxrh_nid680x0000824D1064rwNormal read/write0x00000000Contains bits[192:128] of CCIX Protocol Error (PER) Message payload.
por_cxla_permsg_pyld_192_255_u_cxrh_nid680x0000824D1864rwNormal read/write0x00000000Contains bits[255:192] of CCIX Protocol Error (PER) Message payload.
por_cxla_permsg_ctl_u_cxrh_nid680x0000824D2064mixedMixed types. See bit-field details.0x00000000Contains Control bits to trigger CCIX Protocol Error (PER) Message.
por_cxla_err_agent_id_u_cxrh_nid680x0000824D2864mixedMixed types. See bit-field details.0x00000000Contains Error Agent ID. Must be programmed by CCIX discovery s/w. Used as TargetID on CCIX Protocol Error (PER) Message.
por_cxla_pmu_event_sel_u_cxrh_nid680x000082600064mixedMixed types. See bit-field details.0x00000000Specifies the PMU event to be counted.
por_cxla_pmu_config_u_cxrh_nid680x000082621064mixedMixed types. See bit-field details.0x00000000Configures the CXLA PMU.
por_cxla_pmevcnt_u_cxrh_nid680x000082622064rwNormal read/write0x00000000Contains all PMU event counters (0, 1, 2, 3).
por_cxla_pmevcntsr_u_cxrh_nid680x000082624064rwNormal read/write0x00000000Functions as the PMU event counter shadow register for all counters (0, 1, 2, 3).
por_rnsam_node_info_u_rnfbesam_nid640x000082800064mixedMixed types. See bit-field details.0x0040000FProvides component identification information.
por_rnsam_child_info_u_rnfbesam_nid640x000082808064mixedMixed types. See bit-field details.0x00000000Provides component child identification information.
por_rnsam_unit_info_u_rnfbesam_nid640x000082890064mixedMixed types. See bit-field details.0x800040004Provides component identification information for RN SAM.
por_rnsam_secure_register_groups_override_u_rnfbesam_nid640x000082898064mixedMixed types. See bit-field details.0x00000000Allows non-secure access to predefined groups of secure registers.
rnsam_status_u_rnfbesam_nid640x0000828C0064mixedMixed types. See bit-field details.0x00000001Functions as the default and programming mode status register.
non_hash_mem_region_reg0_u_rnfbesam_nid640x0000828C0864mixedMixed types. See bit-field details.0x00000000Configures non-hashed memory regions 0 and 1.
non_hash_mem_region_reg1_u_rnfbesam_nid640x0000828C1064mixedMixed types. See bit-field details.0x00000000Configures non-hashed memory regions 2 and 3.
non_hash_mem_region_reg2_u_rnfbesam_nid640x0000828C1864mixedMixed types. See bit-field details.0x00000000Configures non-hashed memory regions 4 and 5.
non_hash_mem_region_reg3_u_rnfbesam_nid640x0000828C2064mixedMixed types. See bit-field details.0x00000000Configures non-hashed memory regions 6 and 7.
non_hash_tgt_nodeid0_u_rnfbesam_nid640x0000828C3064mixedMixed types. See bit-field details.0x00000000Configures non-hashed target node IDs 0 to 3.
non_hash_tgt_nodeid1_u_rnfbesam_nid640x0000828C3864mixedMixed types. See bit-field details.0x00000000Configures non-hashed target node IDs 4 to 7.
sys_cache_grp_region0_u_rnfbesam_nid640x0000828C4864mixedMixed types. See bit-field details.0x00000000Configures hashed memory regions 0 and 1.
sys_cache_grp_region1_u_rnfbesam_nid640x0000828C5064mixedMixed types. See bit-field details.0x00000000Configures hashed memory regions 2 and 3.
sys_cache_grp_hn_nodeid_reg0_u_rnfbesam_nid640x0000828C5864mixedMixed types. See bit-field details.0x00000000Configures hashed node IDs for system cache groups. Controls target HN node IDs 0 to 3.
sys_cache_grp_hn_nodeid_reg2_u_rnfbesam_nid640x0000828C6864mixedMixed types. See bit-field details.0x00000000Configures hashed node IDs for system cache groups. Controls target HN node IDs 8 to 11.
sys_cache_grp_hn_nodeid_reg4_u_rnfbesam_nid640x0000828C7864mixedMixed types. See bit-field details.0x00000000Configures hashed node IDs for system cache groups. Controls target HN node IDs 16 to 19.
sys_cache_grp_hn_nodeid_reg6_u_rnfbesam_nid640x0000828C8864mixedMixed types. See bit-field details.0x00000000Configures hashed node IDs for system cache groups. Controls target HN node IDs 24 to 27.
sys_cache_grp_nonhash_nodeid_u_rnfbesam_nid640x0000828C9864mixedMixed types. See bit-field details.0x00000000Configures non-hashed node IDs for system cache groups 1 to 3. NOTE: Only applicable in the non-hashed mode.
sys_cache_group_hn_count_u_rnfbesam_nid640x0000828D0064mixedMixed types. See bit-field details.0x00000000Indicates number of HN-Fs in system cache groups 0 to 3.
gic_mem_region_reg_u_rnfbesam_nid640x0000828D5864mixedMixed types. See bit-field details.0x00000000Configures GIC memory region.
cml_port_aggr_mode_ctrl_reg_u_rnfbesam_nid640x0000828E0064mixedMixed types. See bit-field details.0x00000000Configures the CCIX port aggregation modes for all non-hashed memory regions.
cml_port_aggr_grp0_add_mask_u_rnfbesam_nid640x0000828E0864mixedMixed types. See bit-field details.0x00000040Configures the CCIX port aggregation address mask for group 0.
cml_port_aggr_grp1_add_mask_u_rnfbesam_nid640x0000828E1064mixedMixed types. See bit-field details.0x00000040Configures the CCIX port aggregation address mask for group 1.
cml_port_aggr_grp0_reg_u_rnfbesam_nid640x0000828E4064mixedMixed types. See bit-field details.0x00000000Configures the CCIX port aggregation port IDs for group 0.
cml_port_aggr_grp1_reg_u_rnfbesam_nid640x0000828E4864mixedMixed types. See bit-field details.0x00000000Configures the CCIX port aggregation port IDs for group 1.
por_rnsam_node_info_u_cxrh_nid680x000085400064mixedMixed types. See bit-field details.0x0044000FProvides component identification information.
por_rnsam_child_info_u_cxrh_nid680x000085408064mixedMixed types. See bit-field details.0x00000000Provides component child identification information.
por_rnsam_unit_info_u_cxrh_nid680x000085490064mixedMixed types. See bit-field details.0x800040004Provides component identification information for RN SAM.
por_rnsam_secure_register_groups_override_u_cxrh_nid680x000085498064mixedMixed types. See bit-field details.0x00000000Allows non-secure access to predefined groups of secure registers.
rnsam_status_u_cxrh_nid680x0000854C0064mixedMixed types. See bit-field details.0x00000001Functions as the default and programming mode status register.
non_hash_mem_region_reg0_u_cxrh_nid680x0000854C0864mixedMixed types. See bit-field details.0x00000000Configures non-hashed memory regions 0 and 1.
non_hash_mem_region_reg1_u_cxrh_nid680x0000854C1064mixedMixed types. See bit-field details.0x00000000Configures non-hashed memory regions 2 and 3.
non_hash_mem_region_reg2_u_cxrh_nid680x0000854C1864mixedMixed types. See bit-field details.0x00000000Configures non-hashed memory regions 4 and 5.
non_hash_mem_region_reg3_u_cxrh_nid680x0000854C2064mixedMixed types. See bit-field details.0x00000000Configures non-hashed memory regions 6 and 7.
non_hash_tgt_nodeid0_u_cxrh_nid680x0000854C3064mixedMixed types. See bit-field details.0x00000000Configures non-hashed target node IDs 0 to 3.
non_hash_tgt_nodeid1_u_cxrh_nid680x0000854C3864mixedMixed types. See bit-field details.0x00000000Configures non-hashed target node IDs 4 to 7.
sys_cache_grp_region0_u_cxrh_nid680x0000854C4864mixedMixed types. See bit-field details.0x00000000Configures hashed memory regions 0 and 1.
sys_cache_grp_region1_u_cxrh_nid680x0000854C5064mixedMixed types. See bit-field details.0x00000000Configures hashed memory regions 2 and 3.
sys_cache_grp_hn_nodeid_reg0_u_cxrh_nid680x0000854C5864mixedMixed types. See bit-field details.0x00000000Configures hashed node IDs for system cache groups. Controls target HN node IDs 0 to 3.
sys_cache_grp_hn_nodeid_reg2_u_cxrh_nid680x0000854C6864mixedMixed types. See bit-field details.0x00000000Configures hashed node IDs for system cache groups. Controls target HN node IDs 8 to 11.
sys_cache_grp_hn_nodeid_reg4_u_cxrh_nid680x0000854C7864mixedMixed types. See bit-field details.0x00000000Configures hashed node IDs for system cache groups. Controls target HN node IDs 16 to 19.
sys_cache_grp_hn_nodeid_reg6_u_cxrh_nid680x0000854C8864mixedMixed types. See bit-field details.0x00000000Configures hashed node IDs for system cache groups. Controls target HN node IDs 24 to 27.
sys_cache_grp_nonhash_nodeid_u_cxrh_nid680x0000854C9864mixedMixed types. See bit-field details.0x00000000Configures non-hashed node IDs for system cache groups 1 to 3. NOTE: Only applicable in the non-hashed mode.
sys_cache_group_hn_count_u_cxrh_nid680x0000854D0064mixedMixed types. See bit-field details.0x00000000Indicates number of HN-Fs in system cache groups 0 to 3.
gic_mem_region_reg_u_cxrh_nid680x0000854D5864mixedMixed types. See bit-field details.0x00000000Configures GIC memory region.
cml_port_aggr_mode_ctrl_reg_u_cxrh_nid680x0000854E0064mixedMixed types. See bit-field details.0x00000000Configures the CCIX port aggregation modes for all non-hashed memory regions.
cml_port_aggr_grp0_add_mask_u_cxrh_nid680x0000854E0864mixedMixed types. See bit-field details.0x00000040Configures the CCIX port aggregation address mask for group 0.
cml_port_aggr_grp1_add_mask_u_cxrh_nid680x0000854E1064mixedMixed types. See bit-field details.0x00000040Configures the CCIX port aggregation address mask for group 1.
cml_port_aggr_grp0_reg_u_cxrh_nid680x0000854E4064mixedMixed types. See bit-field details.0x00000000Configures the CCIX port aggregation port IDs for group 0.
cml_port_aggr_grp1_reg_u_cxrh_nid680x0000854E4864mixedMixed types. See bit-field details.0x00000000Configures the CCIX port aggregation port IDs for group 1.
por_cxg_ra_node_info_u_cxrh_nid720x000090000064mixedMixed types. See bit-field details.0x100480100Provides component identification information.
por_cxg_ra_child_info_u_cxrh_nid720x000090008064mixedMixed types. See bit-field details.0x00000000Provides component child identification information.
por_cxg_ra_unit_info_u_cxrh_nid720x000090090064mixedMixed types. See bit-field details.0x204006021000108Provides component identification information for CXRA.
por_cxg_ra_secure_register_groups_override_u_cxrh_nid720x000090098064mixedMixed types. See bit-field details.0x00000000Allows non-secure access to predefined groups of secure registers.
por_cxg_ra_cfg_ctl_u_cxrh_nid720x0000900A0064mixedMixed types. See bit-field details.0x00000002Functions as the configuration control register. Specifies the current mode.
por_cxg_ra_aux_ctl_u_cxrh_nid720x0000900A0864mixedMixed types. See bit-field details.0x00000006Functions as the auxiliary control register for CXRA.
por_cxg_ra_sam_addr_region_reg0_u_cxrh_nid720x0000900DA864mixedMixed types. See bit-field details.0x00000000Configures Address Region 0 for RA SAM.
por_cxg_ra_sam_addr_region_reg1_u_cxrh_nid720x0000900DB064mixedMixed types. See bit-field details.0x00000000Configures Address Region 1 for RA SAM.
por_cxg_ra_sam_addr_region_reg2_u_cxrh_nid720x0000900DB864mixedMixed types. See bit-field details.0x00000000Configures Address Region 2 for RA SAM.
por_cxg_ra_sam_addr_region_reg3_u_cxrh_nid720x0000900DC064mixedMixed types. See bit-field details.0x00000000Configures Address Region 3 for RA SAM.
por_cxg_ra_sam_addr_region_reg4_u_cxrh_nid720x0000900DC864mixedMixed types. See bit-field details.0x00000000Configures Address Region 4 for RA SAM.
por_cxg_ra_sam_addr_region_reg5_u_cxrh_nid720x0000900DD064mixedMixed types. See bit-field details.0x00000000Configures Address Region 5 for RA SAM.
por_cxg_ra_sam_addr_region_reg6_u_cxrh_nid720x0000900DD864mixedMixed types. See bit-field details.0x00000000Configures Address Region 6 for RA SAM.
por_cxg_ra_sam_addr_region_reg7_u_cxrh_nid720x0000900DE064mixedMixed types. See bit-field details.0x00000000Configures Address Region 7 for RA SAM.
por_cxg_ra_agentid_to_linkid_reg0_u_cxrh_nid720x0000900E6064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 0 to 7.
por_cxg_ra_agentid_to_linkid_reg1_u_cxrh_nid720x0000900E6864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 8 to 15.
por_cxg_ra_agentid_to_linkid_reg2_u_cxrh_nid720x0000900E7064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 16 to 23.
por_cxg_ra_agentid_to_linkid_reg3_u_cxrh_nid720x0000900E7864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 24 to 31.
por_cxg_ra_agentid_to_linkid_reg4_u_cxrh_nid720x0000900E8064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 32 to 39.
por_cxg_ra_agentid_to_linkid_reg5_u_cxrh_nid720x0000900E8864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 40 to 47.
por_cxg_ra_agentid_to_linkid_reg6_u_cxrh_nid720x0000900E9064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 48 to 55.
por_cxg_ra_agentid_to_linkid_reg7_u_cxrh_nid720x0000900E9864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 56 to 63.
por_cxg_ra_rnf_ldid_to_raid_reg0_u_cxrh_nid720x0000900EA064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of RN-F LDID to RAID for LDIDs 0 to 7.
por_cxg_ra_rni_ldid_to_raid_reg0_u_cxrh_nid720x0000900EE064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of RN-I LDID to RAID for LDIDs 0 to 7.
por_cxg_ra_agentid_to_linkid_val_u_cxrh_nid720x0000900F2064rwNormal read/write0x00000000Specifies which Agent ID to Link ID mappings are valid.
por_cxg_ra_rnf_ldid_to_raid_val_u_cxrh_nid720x0000900F2864rwNormal read/write0x00000000Specifies which RN-F LDID to RAID mappings are valid.
por_cxg_ra_rni_ldid_to_raid_val_u_cxrh_nid720x0000900F3064mixedMixed types. See bit-field details.0x00000000Specifies which RN-I LDID to RAID mappings are valid.
por_cxg_ra_rnd_ldid_to_raid_val_u_cxrh_nid720x0000900F3864mixedMixed types. See bit-field details.0x00000000Specifies which RN-D LDID to RAID mappings are valid.
por_cxg_ra_cxprtcl_link0_ctl_u_cxrh_nid720x000090100064mixedMixed types. See bit-field details.0x00000000Functions as the CXRA CCIX Protocol Link 0 control register. Works with por_cxg_ra_cxprtcl_link0_status.
por_cxg_ra_cxprtcl_link0_status_u_cxrh_nid720x000090100864mixedMixed types. See bit-field details.0x00000002Functions as the CXRA CCIX Protocol Link 0 status register. Works with por_cxg_ra_cxprtcl_link0_ctl.
por_cxg_ra_cxprtcl_link1_ctl_u_cxrh_nid720x000090101064mixedMixed types. See bit-field details.0x00000000Functions as the CXRA CCIX Protocol Link 1 control register. Works with por_cxg_ra_cxprtcl_link1_status.
por_cxg_ra_cxprtcl_link1_status_u_cxrh_nid720x000090101864mixedMixed types. See bit-field details.0x00000002Functions as the CXRA CCIX Protocol Link 1 status register. Works with por_cxg_ra_cxprtcl_link1_ctl.
por_cxg_ra_cxprtcl_link2_ctl_u_cxrh_nid720x000090102064mixedMixed types. See bit-field details.0x00000000Functions as the CXRA CCIX Protocol Link 2 control register. Works with por_cxg_ra_cxprtcl_link2_status.
por_cxg_ra_cxprtcl_link2_status_u_cxrh_nid720x000090102864mixedMixed types. See bit-field details.0x00000002Functions as the CXRA CCIX Protocol Link 2 status register. Works with por_cxg_ra_cxprtcl_link2_ctl.
por_cxg_ra_pmu_event_sel_u_cxrh_nid720x000090200064mixedMixed types. See bit-field details.0x00000000Specifies the PMU event to be counted.
por_mxp_node_info_u_smxp_2_10x000090800064mixedMixed types. See bit-field details.0x500480006Provides component identification information.
por_mxp_device_port_connect_info_p0_u_smxp_2_10x000090800864mixedMixed types. See bit-field details.0x00000013Contains device port connection information for port 0.
por_mxp_device_port_connect_info_p1_u_smxp_2_10x000090801064mixedMixed types. See bit-field details.0x00010005Contains device port connection information for port 1.
por_mxp_mesh_port_connect_info_east_u_smxp_2_10x000090801864mixedMixed types. See bit-field details.0x00000000Contains port connection information for East port.
por_mxp_mesh_port_connect_info_north_u_smxp_2_10x000090802064mixedMixed types. See bit-field details.0x00000000Contains port connection information for North port.
por_mxp_child_info_u_smxp_2_10x000090808064mixedMixed types. See bit-field details.0x01000005Provides component child identification information.
por_mxp_child_pointer_0_u_smxp_2_10x000090810064mixedMixed types. See bit-field details.0x00968000Contains base address of the configuration slave for child 0.
por_mxp_child_pointer_1_u_smxp_2_10x000090810864mixedMixed types. See bit-field details.0x80920000Contains base address of the configuration slave for child 1.
por_mxp_child_pointer_2_u_smxp_2_10x000090811064mixedMixed types. See bit-field details.0x00950000Contains base address of the configuration slave for child 2.
por_mxp_child_pointer_3_u_smxp_2_10x000090811864mixedMixed types. See bit-field details.0x00910000Contains base address of the configuration slave for child 3.
por_mxp_child_pointer_4_u_smxp_2_10x000090812064mixedMixed types. See bit-field details.0x00900000Contains base address of the configuration slave for child 4.
por_mxp_child_pointer_5_u_smxp_2_10x000090812864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 5.
por_mxp_child_pointer_6_u_smxp_2_10x000090813064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 6.
por_mxp_child_pointer_7_u_smxp_2_10x000090813864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 7.
por_mxp_child_pointer_8_u_smxp_2_10x000090814064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 8.
por_mxp_child_pointer_9_u_smxp_2_10x000090814864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 9.
por_mxp_child_pointer_10_u_smxp_2_10x000090815064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 10.
por_mxp_child_pointer_11_u_smxp_2_10x000090815864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 11.
por_mxp_child_pointer_12_u_smxp_2_10x000090816064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 12.
por_mxp_child_pointer_13_u_smxp_2_10x000090816864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 13.
por_mxp_child_pointer_14_u_smxp_2_10x000090817064mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 14.
por_mxp_child_pointer_15_u_smxp_2_10x000090817864mixedMixed types. See bit-field details.0x00000000Contains base address of the configuration slave for child 15.
por_mxp_p0_info_u_smxp_2_10x000090890064mixedMixed types. See bit-field details.0x00000211Provides component identification information for XP port 0.
por_mxp_p1_info_u_smxp_2_10x000090890864mixedMixed types. See bit-field details.0x00000491Provides component identification information for XP port 1.
por_mxp_secure_register_groups_override_u_smxp_2_10x000090898064mixedMixed types. See bit-field details.0x00000000Allows non-secure access to predefined groups of secure registers.
por_mxp_aux_ctl_u_smxp_2_10x0000908A0064mixedMixed types. See bit-field details.0x00000000Functions as the auxiliary control register for XP.
por_mxp_p0_qos_control_u_smxp_2_10x0000908A8064mixedMixed types. See bit-field details.0x00000000Controls QoS settings for devices connected to port 0.
por_mxp_p0_qos_lat_tgt_u_smxp_2_10x0000908A8864mixedMixed types. See bit-field details.0x00000000Controls QoS target latency/period (in cycles) for regulation of devices connected to port 0.
por_mxp_p0_qos_lat_scale_u_smxp_2_10x0000908A9064mixedMixed types. See bit-field details.0x00000000Controls the QoS target scale factor for devices connected to port 0. The scale factor is represented in powers of two from the range 2^(-3) to 2^(-10).
por_mxp_p0_qos_lat_range_u_smxp_2_10x0000908A9864mixedMixed types. See bit-field details.0x00000000Controls the minimum and maximum QoS values generated by the QoS regulator for devices connected to port 0.
por_mxp_p1_qos_control_u_smxp_2_10x0000908AA064mixedMixed types. See bit-field details.0x00000000Controls QoS settings for devices connected to port 1.
por_mxp_p1_qos_lat_tgt_u_smxp_2_10x0000908AA864mixedMixed types. See bit-field details.0x00000000Controls QoS target latency/period (in cycles) for regulation of devices connected to port 1.
por_mxp_p1_qos_lat_scale_u_smxp_2_10x0000908AB064mixedMixed types. See bit-field details.0x00000000Controls the QoS target scale factor for devices connected to port 1. The scale factor is represented in powers of two from the range 2^(-3) to 2^(-10).
por_mxp_p1_qos_lat_range_u_smxp_2_10x0000908AB864mixedMixed types. See bit-field details.0x00000000Controls the minimum and maximum QoS values generated by the QoS regulator for devices connected to port 1.
por_mxp_p0_syscoreq_ctl_u_smxp_2_10x000090900064mixedMixed types. See bit-field details.0x00000000Functions as the port 0 snoop and DVM domain control register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p0_syscoack_status. NOTE: Only valid on RN-F ports.
por_mxp_p1_syscoreq_ctl_u_smxp_2_10x000090900864mixedMixed types. See bit-field details.0x00000000Functions as the port 1 snoop and DVM domain control register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p1_syscoack_status. NOTE: Only valid on RN-F ports.
por_mxp_p0_syscoack_status_u_smxp_2_10x000090901064mixedMixed types. See bit-field details.0x00000000Functions as the port 0 snoop and DVM domain status register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p0_syscoreq_ctl. NOTE: Only valid on RN-F ports.
por_mxp_p1_syscoack_status_u_smxp_2_10x000090901864mixedMixed types. See bit-field details.0x00000000Functions as the port 1 snoop and DVM domain status register. Provides a software alternative to hardware SYSCOREQ/SYSCOACK handshake. Works with por_mxp_p1_syscoreq_ctl. NOTE: Only valid on RN-F ports.
por_mxp_pmu_event_sel_u_smxp_2_10x000090A00064mixedMixed types. See bit-field details.0x00000000Specifies the PMU event to be counted.
por_dtm_control_u_smxp_2_10x000090A10064mixedMixed types. See bit-field details.0x00000000Functions as the DTM control register.
por_dtm_fifo_entry_ready_u_smxp_2_10x000090A11864mixedMixed types. See bit-field details.0x00000000Controls status of DTM FIFO entries.
por_dtm_fifo_entry0_0_u_smxp_2_10x000090A12064roRead-only0x00000000Contains DTM FIFO entry 0 data.
por_dtm_fifo_entry0_1_u_smxp_2_10x000090A12864roRead-only0x00000000Contains DTM FIFO entry 0 data.
por_dtm_fifo_entry0_2_u_smxp_2_10x000090A13064mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 0 data.
por_dtm_fifo_entry1_0_u_smxp_2_10x000090A13864roRead-only0x00000000Contains DTM FIFO entry 1 data.
por_dtm_fifo_entry1_1_u_smxp_2_10x000090A14064roRead-only0x00000000Contains DTM FIFO entry 1 data.
por_dtm_fifo_entry1_2_u_smxp_2_10x000090A14864mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 1 data.
por_dtm_fifo_entry2_0_u_smxp_2_10x000090A15064roRead-only0x00000000Contains DTM FIFO entry 2 data.
por_dtm_fifo_entry2_1_u_smxp_2_10x000090A15864roRead-only0x00000000Contains DTM FIFO entry 2 data.
por_dtm_fifo_entry2_2_u_smxp_2_10x000090A16064mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 2 data.
por_dtm_fifo_entry3_0_u_smxp_2_10x000090A16864roRead-only0x00000000Contains DTM FIFO entry 3 data.
por_dtm_fifo_entry3_1_u_smxp_2_10x000090A17064roRead-only0x00000000Contains DTM FIFO entry 3 data.
por_dtm_fifo_entry3_2_u_smxp_2_10x000090A17864mixedMixed types. See bit-field details.0x00000000Contains DTM FIFO entry 3 data.
por_dtm_wp0_config_u_smxp_2_10x000090A1A064mixedMixed types. See bit-field details.0x00000000Configures watchpoint 0.
por_dtm_wp0_val_u_smxp_2_10x000090A1A864rwNormal read/write0x00000000Configures watchpoint 0 comparison value.
por_dtm_wp0_mask_u_smxp_2_10x000090A1B064rwNormal read/write0x00000000Configures watchpoint0 comparison mask.
por_dtm_wp1_config_u_smxp_2_10x000090A1B864mixedMixed types. See bit-field details.0x00000000Configures watchpoint 1.
por_dtm_wp1_val_u_smxp_2_10x000090A1C064rwNormal read/write0x00000000Configures watchpoint 1 comparison value.
por_dtm_wp1_mask_u_smxp_2_10x000090A1C864rwNormal read/write0x00000000Configures watchpoint 1 comparison mask.
por_dtm_wp2_config_u_smxp_2_10x000090A1D064mixedMixed types. See bit-field details.0x00000000Configures watchpoint 2.
por_dtm_wp2_val_u_smxp_2_10x000090A1D864rwNormal read/write0x00000000Configures watchpoint 2 comparison value.
por_dtm_wp2_mask_u_smxp_2_10x000090A1E064rwNormal read/write0x00000000Configures watchpoint 2 comparison mask.
por_dtm_wp3_config_u_smxp_2_10x000090A1E864mixedMixed types. See bit-field details.0x00000000Configures watchpoint 3.
por_dtm_wp3_val_u_smxp_2_10x000090A1F064rwNormal read/write0x00000000Configures watchpoint 3 comparison value.
por_dtm_wp3_mask_u_smxp_2_10x000090A1F864rwNormal read/write0x00000000Configures watchpoint 3 comparison mask.
por_dtm_pmsicr_u_smxp_2_10x000090A20064mixedMixed types. See bit-field details.0x00000000Functions as the sampling interval counter register.
por_dtm_pmsirr_u_smxp_2_10x000090A20864mixedMixed types. See bit-field details.0x00000000Functions as the sampling interval reload register.
por_dtm_pmu_config_u_smxp_2_10x000090A21064mixedMixed types. See bit-field details.0x00000000Configures the DTM PMU.
por_dtm_pmevcnt_u_smxp_2_10x000090A22064rwNormal read/write0x00000000Contains all PMU event counters (0, 1, 2, 3).
por_dtm_pmevcntsr_u_smxp_2_10x000090A24064rwNormal read/write0x00000000Functions as the PMU event counter shadow register for all counters (0, 1, 2, 3).
por_mxp_errfr_u_smxp_2_10x000090B00064mixedMixed types. See bit-field details.0x000000A1Functions as the error feature register.
por_mxp_errctlr_u_smxp_2_10x000090B00864mixedMixed types. See bit-field details.0x00000000Functions as the error control register. Controls whether specific error-handling interrupts and error detection/deferment are enabled.
por_mxp_errstatus_u_smxp_2_10x000090B01064mixedMixed types. See bit-field details.0x00000000Functions as the error status register. AV and MV bits must be cleared in the same cycle, otherwise the error record does not have a consistent view.
por_mxp_errmisc_u_smxp_2_10x000090B02864mixedMixed types. See bit-field details.0x00000000Functions as the miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors.
por_mxp_errfr_NS_u_smxp_2_10x000090B10064mixedMixed types. See bit-field details.0x000000A1Functions as the non-secure error feature register.
por_mxp_errctlr_NS_u_smxp_2_10x000090B10864mixedMixed types. See bit-field details.0x00000000Functions as the non-secure error control register. Controls whether specific error-handling interrupts and error detection/deferment are enabled.
por_mxp_errstatus_NS_u_smxp_2_10x000090B11064mixedMixed types. See bit-field details.0x00000000Functions as the non-secure error status register.
por_mxp_errmisc_NS_u_smxp_2_10x000090B12864mixedMixed types. See bit-field details.0x00000000Functions as the non-secure miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors.
por_cxg_ha_node_info_u_cxrh_nid720x000091000064mixedMixed types. See bit-field details.0x100480101Provides component identification information.
por_cxg_ha_id_u_cxrh_nid720x000091000864mixedMixed types. See bit-field details.0x00000000Contains the CCIX-assigned HAID.
por_cxg_ha_child_info_u_cxrh_nid720x000091008064mixedMixed types. See bit-field details.0x00000000Provides component child identification information.
por_cxg_ha_unit_info_u_cxrh_nid720x000091090064roRead-only0x4030603018100C0Provides component identification information for CXHA.
por_cxg_ha_secure_register_groups_override_u_cxrh_nid720x000091098064mixedMixed types. See bit-field details.0x00000000Allows non-secure access to predefined groups of secure registers.
por_cxg_ha_aux_ctl_u_cxrh_nid720x0000910A0864mixedMixed types. See bit-field details.0x00000008Functions as the auxiliary control register for CXHA.
por_cxg_ha_rnf_raid_to_ldid_reg0_u_cxrh_nid720x0000910C0064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of RAID to RN-F LDID for RAIDs 0 to 7.
por_cxg_ha_rnf_raid_to_ldid_reg1_u_cxrh_nid720x0000910C0864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of RAID to RN-F LDID for RAIDs 8 to 15.
por_cxg_ha_rnf_raid_to_ldid_reg2_u_cxrh_nid720x0000910C1064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of RAID to RN-F LDID for RAIDs 16 to 23.
por_cxg_ha_rnf_raid_to_ldid_reg3_u_cxrh_nid720x0000910C1864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of RAID to RN-F LDID for RAIDs 24 to 31.
por_cxg_ha_rnf_raid_to_ldid_reg4_u_cxrh_nid720x0000910C2064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of RAID to RN-F LDID for RAIDs 32 to 39.
por_cxg_ha_rnf_raid_to_ldid_reg5_u_cxrh_nid720x0000910C2864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of RAID to RN-F LDID for RAIDs 40 to 47.
por_cxg_ha_rnf_raid_to_ldid_reg6_u_cxrh_nid720x0000910C3064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of RAID to RN-F LDID for RAIDs 48 to 55.
por_cxg_ha_rnf_raid_to_ldid_reg7_u_cxrh_nid720x0000910C3864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of RAID to RN-F LDID for RAIDs 56 to 63.
por_cxg_ha_agentid_to_linkid_reg0_u_cxrh_nid720x0000910C4064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 0 to 7.
por_cxg_ha_agentid_to_linkid_reg1_u_cxrh_nid720x0000910C4864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 8 to 15.
por_cxg_ha_agentid_to_linkid_reg2_u_cxrh_nid720x0000910C5064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 16 to 23.
por_cxg_ha_agentid_to_linkid_reg3_u_cxrh_nid720x0000910C5864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 24 to 31.
por_cxg_ha_agentid_to_linkid_reg4_u_cxrh_nid720x0000910C6064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 32 to 39.
por_cxg_ha_agentid_to_linkid_reg5_u_cxrh_nid720x0000910C6864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 40 to 47.
por_cxg_ha_agentid_to_linkid_reg6_u_cxrh_nid720x0000910C7064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 48 to 55.
por_cxg_ha_agentid_to_linkid_reg7_u_cxrh_nid720x0000910C7864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 56 to 63.
por_cxg_ha_agentid_to_linkid_val_u_cxrh_nid720x0000910D0064rwNormal read/write0x00000000Specifies which Agent ID to Link ID mappings are valid.
por_cxg_ha_rnf_raid_to_ldid_val_u_cxrh_nid720x0000910D0864rwNormal read/write0x00000000Specifies which RAID to RN-F LDID mappings are valid.
por_cxg_ha_cxprtcl_link0_ctl_u_cxrh_nid720x000091100064mixedMixed types. See bit-field details.0x00000000Functions as the CXHA CCIX Protocol Link 0 control register. Works with por_cxg_ha_cxprtcl_link0_status.
por_cxg_ha_cxprtcl_link0_status_u_cxrh_nid720x000091100864mixedMixed types. See bit-field details.0x00000002Functions as the CXHA CCIX Protocol Link 0 status register. Works with por_cxg_ha_cxprtcl_link0_ctl.
por_cxg_ha_cxprtcl_link1_ctl_u_cxrh_nid720x000091101064mixedMixed types. See bit-field details.0x00000000Functions as the CXHA CCIX Protocol Link 1 control register. Works with por_cxg_ha_cxprtcl_link1_status.
por_cxg_ha_cxprtcl_link1_status_u_cxrh_nid720x000091101864mixedMixed types. See bit-field details.0x00000002Functions as the CXHA CCIX Protocol Link 1 status register. Works with por_cxg_ha_cxprtcl_link1_ctl.
por_cxg_ha_cxprtcl_link2_ctl_u_cxrh_nid720x000091102064mixedMixed types. See bit-field details.0x00000000Functions as the CXHA CCIX Protocol Link 2 control register. Works with por_cxg_ha_cxprtcl_link2_status.
por_cxg_ha_cxprtcl_link2_status_u_cxrh_nid720x000091102864mixedMixed types. See bit-field details.0x00000002Functions as the CXHA CCIX Protocol Link 2 status register. Works with por_cxg_ha_cxprtcl_link2_ctl.
por_cxg_ha_pmu_event_sel_u_cxrh_nid720x000091200064mixedMixed types. See bit-field details.0x00000000Specifies the PMU event to be counted as a 6-bit ID with the following encodings: 6b000000: CXHA_PMU_EVENT_NULL 6b100001: CXHA_PMU_EVENT_RDDATBYP 6b100010: CXHA_PMU_EVENT_CHIRSP_UP_STALL 6b100011: CXHA_PMU_EVENT_CHIDAT_UP_STALL 6b100100: CXHA_PMU_EVENT_SNPPCRD_LNK0_STALL 6b100101: CXHA_PMU_EVENT_SNPPCRD_LNK1_STALL 6b100110: CXHA_PMU_EVENT_SNPPCRD_LNK2_STALL 6b100111: CXHA_PMU_EVENT_REQTRK_OCC 6b101000: CXHA_PMU_EVENT_RDB_OCC 6b101001: CXHA_PMU_EVENT_RDBBYP_OCC 6b101010: CXHA_PMU_EVENT_WDB_OCC 6b101011: CXHA_PMU_EVENT_SNPTRK_OCC 6b101100: CXHA_PMU_EVENT_SDB_OCC 6b101101: CXHA_PMU_EVENT_SNPHAZ_OCC
por_cxg_ha_errfr_u_cxrh_nid720x000091300064mixedMixed types. See bit-field details.0x000000A5Functions as the error feature register.
por_cxg_ha_errctlr_u_cxrh_nid720x000091300864mixedMixed types. See bit-field details.0x00000000Functions as the error control register. Controls whether specific error-handling interrupts and error detection/deferment are enabled.
por_cxg_ha_errstatus_u_cxrh_nid720x000091301064mixedMixed types. See bit-field details.0x00000000Functions as the error status register. AV and MV bits must be cleared in the same cycle, otherwise the error record does not have a consistent view.
por_cxg_ha_erraddr_u_cxrh_nid720x000091301864mixedMixed types. See bit-field details.0x00000000Contains the error record address.
por_cxg_ha_errmisc_u_cxrh_nid720x000091302064mixedMixed types. See bit-field details.0x00000000Functions as the miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors.
por_cxg_ha_errfr_NS_u_cxrh_nid720x000091310064mixedMixed types. See bit-field details.0x000000A5Functions as the non-secure error feature register.
por_cxg_ha_errctlr_NS_u_cxrh_nid720x000091310864mixedMixed types. See bit-field details.0x00000000Functions as the non-secure error control register. Controls whether specific error-handling interrupts and error detection/deferment are enabled.
por_cxg_ha_errstatus_NS_u_cxrh_nid720x000091311064mixedMixed types. See bit-field details.0x00000000Functions as the non-secure error status register. AV and MV bits must be cleared in the same cycle, otherwise the error record does not have a consistent view.
por_cxg_ha_erraddr_NS_u_cxrh_nid720x000091311864mixedMixed types. See bit-field details.0x00000000Contains the non-secure error record address.
por_cxg_ha_errmisc_NS_u_cxrh_nid720x000091312064mixedMixed types. See bit-field details.0x00000000Functions as the non-secure miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors.
por_cxla_node_info_u_cxrh_nid720x000092000064mixedMixed types. See bit-field details.0x100480102Provides component identification information.
por_cxla_child_info_u_cxrh_nid720x000092008064mixedMixed types. See bit-field details.0x00000000Provides component child identification information.
por_cxla_unit_info_u_cxrh_nid720x000092090064mixedMixed types. See bit-field details.0x00082207Provides component identification information for CXLA.
por_cxla_secure_register_groups_override_u_cxrh_nid720x000092098064mixedMixed types. See bit-field details.0x00000000Allows non-secure access to predefined groups of secure registers.
por_cxla_aux_ctl_u_cxrh_nid720x0000920A0864mixedMixed types. See bit-field details.0x220000000180Functions as the auxiliary control register for CXLA.
por_cxla_ccix_prop_capabilities_u_cxrh_nid720x0000920C0064mixedMixed types. See bit-field details.0x00000100Contains CCIX-supported properties.
por_cxla_ccix_prop_configured_u_cxrh_nid720x0000920C0864mixedMixed types. See bit-field details.0x00000400Contains CCIX-configured properties.
por_cxla_tx_cxs_attr_capabilities_u_cxrh_nid720x0000920C1064mixedMixed types. See bit-field details.0x00000030Contains TX CXS supported attributes.
por_cxla_rx_cxs_attr_capabilities_u_cxrh_nid720x0000920C1864mixedMixed types. See bit-field details.0x00000020Contains RX CXS supported attributes.
por_cxla_agentid_to_linkid_reg0_u_cxrh_nid720x0000920C3064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 0 to 7.
por_cxla_agentid_to_linkid_reg1_u_cxrh_nid720x0000920C3864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 8 to 15.
por_cxla_agentid_to_linkid_reg2_u_cxrh_nid720x0000920C4064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 16 to 23.
por_cxla_agentid_to_linkid_reg3_u_cxrh_nid720x0000920C4864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 24 to 31.
por_cxla_agentid_to_linkid_reg4_u_cxrh_nid720x0000920C5064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 32 to 39.
por_cxla_agentid_to_linkid_reg5_u_cxrh_nid720x0000920C5864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 40 to 47.
por_cxla_agentid_to_linkid_reg6_u_cxrh_nid720x0000920C6064mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 48 to 55.
por_cxla_agentid_to_linkid_reg7_u_cxrh_nid720x0000920C6864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of Agent ID to Link ID for Agent IDs 56 to 63.
por_cxla_agentid_to_linkid_val_u_cxrh_nid720x0000920C7064rwNormal read/write0x00000000Specifies which Agent ID to Link ID mappings are valid.
por_cxla_linkid_to_pcie_bus_num_u_cxrh_nid720x0000920C7864mixedMixed types. See bit-field details.0x00000000Specifies the mapping of CCIX Link ID to PCIe bus number.
por_cxla_tlp_hdr_fields_u_cxrh_nid720x0000920C8064mixedMixed types. See bit-field details.0x7F000072Configures PCIe header field values.
por_cxla_permsg_pyld_0_63_u_cxrh_nid720x0000920D0064rwNormal read/write0x00000000Contains bits[63:0] of CCIX Protocol Error (PER) Message payload.
por_cxla_permsg_pyld_64_127_u_cxrh_nid720x0000920D0864rwNormal read/write0x00000000Contains bits[127:64] of CCIX Protocol Error (PER) Message payload.
por_cxla_permsg_pyld_128_191_u_cxrh_nid720x0000920D1064rwNormal read/write0x00000000Contains bits[192:128] of CCIX Protocol Error (PER) Message payload.
por_cxla_permsg_pyld_192_255_u_cxrh_nid720x0000920D1864rwNormal read/write0x00000000Contains bits[255:192] of CCIX Protocol Error (PER) Message payload.
por_cxla_permsg_ctl_u_cxrh_nid720x0000920D2064mixedMixed types. See bit-field details.0x00000000Contains Control bits to trigger CCIX Protocol Error (PER) Message.
por_cxla_err_agent_id_u_cxrh_nid720x0000920D2864mixedMixed types. See bit-field details.0x00000000Contains Error Agent ID. Must be programmed by CCIX discovery s/w. Used as TargetID on CCIX Protocol Error (PER) Message.
por_cxla_pmu_event_sel_u_cxrh_nid720x000092200064mixedMixed types. See bit-field details.0x00000000Specifies the PMU event to be counted.
por_cxla_pmu_config_u_cxrh_nid720x000092221064mixedMixed types. See bit-field details.0x00000000Configures the CXLA PMU.
por_cxla_pmevcnt_u_cxrh_nid720x000092222064rwNormal read/write0x00000000Contains all PMU event counters (0, 1, 2, 3).
por_cxla_pmevcntsr_u_cxrh_nid720x000092224064rwNormal read/write0x00000000Functions as the PMU event counter shadow register for all counters (0, 1, 2, 3).
por_rnsam_node_info_u_cxrh_nid720x000095000064mixedMixed types. See bit-field details.0x0048000FProvides component identification information.
por_rnsam_child_info_u_cxrh_nid720x000095008064mixedMixed types. See bit-field details.0x00000000Provides component child identification information.
por_rnsam_unit_info_u_cxrh_nid720x000095090064mixedMixed types. See bit-field details.0x800040004Provides component identification information for RN SAM.
por_rnsam_secure_register_groups_override_u_cxrh_nid720x000095098064mixedMixed types. See bit-field details.0x00000000Allows non-secure access to predefined groups of secure registers.
rnsam_status_u_cxrh_nid720x0000950C0064mixedMixed types. See bit-field details.0x00000001Functions as the default and programming mode status register.
non_hash_mem_region_reg0_u_cxrh_nid720x0000950C0864mixedMixed types. See bit-field details.0x00000000Configures non-hashed memory regions 0 and 1.
non_hash_mem_region_reg1_u_cxrh_nid720x0000950C1064mixedMixed types. See bit-field details.0x00000000Configures non-hashed memory regions 2 and 3.
non_hash_mem_region_reg2_u_cxrh_nid720x0000950C1864mixedMixed types. See bit-field details.0x00000000Configures non-hashed memory regions 4 and 5.
non_hash_mem_region_reg3_u_cxrh_nid720x0000950C2064mixedMixed types. See bit-field details.0x00000000Configures non-hashed memory regions 6 and 7.
non_hash_tgt_nodeid0_u_cxrh_nid720x0000950C3064mixedMixed types. See bit-field details.0x00000000Configures non-hashed target node IDs 0 to 3.
non_hash_tgt_nodeid1_u_cxrh_nid720x0000950C3864mixedMixed types. See bit-field details.0x00000000Configures non-hashed target node IDs 4 to 7.
sys_cache_grp_region0_u_cxrh_nid720x0000950C4864mixedMixed types. See bit-field details.0x00000000Configures hashed memory regions 0 and 1.
sys_cache_grp_region1_u_cxrh_nid720x0000950C5064mixedMixed types. See bit-field details.0x00000000Configures hashed memory regions 2 and 3.
sys_cache_grp_hn_nodeid_reg0_u_cxrh_nid720x0000950C5864mixedMixed types. See bit-field details.0x00000000Configures hashed node IDs for system cache groups. Controls target HN node IDs 0 to 3.
sys_cache_grp_hn_nodeid_reg2_u_cxrh_nid720x0000950C6864mixedMixed types. See bit-field details.0x00000000Configures hashed node IDs for system cache groups. Controls target HN node IDs 8 to 11.
sys_cache_grp_hn_nodeid_reg4_u_cxrh_nid720x0000950C7864mixedMixed types. See bit-field details.0x00000000Configures hashed node IDs for system cache groups. Controls target HN node IDs 16 to 19.
sys_cache_grp_hn_nodeid_reg6_u_cxrh_nid720x0000950C8864mixedMixed types. See bit-field details.0x00000000Configures hashed node IDs for system cache groups. Controls target HN node IDs 24 to 27.
sys_cache_grp_nonhash_nodeid_u_cxrh_nid720x0000950C9864mixedMixed types. See bit-field details.0x00000000Configures non-hashed node IDs for system cache groups 1 to 3. NOTE: Only applicable in the non-hashed mode.
sys_cache_group_hn_count_u_cxrh_nid720x0000950D0064mixedMixed types. See bit-field details.0x00000000Indicates number of HN-Fs in system cache groups 0 to 3.
gic_mem_region_reg_u_cxrh_nid720x0000950D5864mixedMixed types. See bit-field details.0x00000000Configures GIC memory region.
cml_port_aggr_mode_ctrl_reg_u_cxrh_nid720x0000950E0064mixedMixed types. See bit-field details.0x00000000Configures the CCIX port aggregation modes for all non-hashed memory regions.
cml_port_aggr_grp0_add_mask_u_cxrh_nid720x0000950E0864mixedMixed types. See bit-field details.0x00000040Configures the CCIX port aggregation address mask for group 0.
cml_port_aggr_grp1_add_mask_u_cxrh_nid720x0000950E1064mixedMixed types. See bit-field details.0x00000040Configures the CCIX port aggregation address mask for group 1.
cml_port_aggr_grp0_reg_u_cxrh_nid720x0000950E4064mixedMixed types. See bit-field details.0x00000000Configures the CCIX port aggregation port IDs for group 0.
cml_port_aggr_grp1_reg_u_cxrh_nid720x0000950E4864mixedMixed types. See bit-field details.0x00000000Configures the CCIX port aggregation port IDs for group 1.
por_rnsam_node_info_u_rnfbesam_nid760x000096800064mixedMixed types. See bit-field details.0x004C000FProvides component identification information.
por_rnsam_child_info_u_rnfbesam_nid760x000096808064mixedMixed types. See bit-field details.0x00000000Provides component child identification information.
por_rnsam_unit_info_u_rnfbesam_nid760x000096890064mixedMixed types. See bit-field details.0x800040004Provides component identification information for RN SAM.
por_rnsam_secure_register_groups_override_u_rnfbesam_nid760x000096898064mixedMixed types. See bit-field details.0x00000000Allows non-secure access to predefined groups of secure registers.
rnsam_status_u_rnfbesam_nid760x0000968C0064mixedMixed types. See bit-field details.0x00000001Functions as the default and programming mode status register.
non_hash_mem_region_reg0_u_rnfbesam_nid760x0000968C0864mixedMixed types. See bit-field details.0x00000000Configures non-hashed memory regions 0 and 1.
non_hash_mem_region_reg1_u_rnfbesam_nid760x0000968C1064mixedMixed types. See bit-field details.0x00000000Configures non-hashed memory regions 2 and 3.
non_hash_mem_region_reg2_u_rnfbesam_nid760x0000968C1864mixedMixed types. See bit-field details.0x00000000Configures non-hashed memory regions 4 and 5.
non_hash_mem_region_reg3_u_rnfbesam_nid760x0000968C2064mixedMixed types. See bit-field details.0x00000000Configures non-hashed memory regions 6 and 7.
non_hash_tgt_nodeid0_u_rnfbesam_nid760x0000968C3064mixedMixed types. See bit-field details.0x00000000Configures non-hashed target node IDs 0 to 3.
non_hash_tgt_nodeid1_u_rnfbesam_nid760x0000968C3864mixedMixed types. See bit-field details.0x00000000Configures non-hashed target node IDs 4 to 7.
sys_cache_grp_region0_u_rnfbesam_nid760x0000968C4864mixedMixed types. See bit-field details.0x00000000Configures hashed memory regions 0 and 1.
sys_cache_grp_region1_u_rnfbesam_nid760x0000968C5064mixedMixed types. See bit-field details.0x00000000Configures hashed memory regions 2 and 3.
sys_cache_grp_hn_nodeid_reg0_u_rnfbesam_nid760x0000968C5864mixedMixed types. See bit-field details.0x00000000Configures hashed node IDs for system cache groups. Controls target HN node IDs 0 to 3.
sys_cache_grp_hn_nodeid_reg2_u_rnfbesam_nid760x0000968C6864mixedMixed types. See bit-field details.0x00000000Configures hashed node IDs for system cache groups. Controls target HN node IDs 8 to 11.
sys_cache_grp_hn_nodeid_reg4_u_rnfbesam_nid760x0000968C7864mixedMixed types. See bit-field details.0x00000000Configures hashed node IDs for system cache groups. Controls target HN node IDs 16 to 19.
sys_cache_grp_hn_nodeid_reg6_u_rnfbesam_nid760x0000968C8864mixedMixed types. See bit-field details.0x00000000Configures hashed node IDs for system cache groups. Controls target HN node IDs 24 to 27.
sys_cache_grp_nonhash_nodeid_u_rnfbesam_nid760x0000968C9864mixedMixed types. See bit-field details.0x00000000Configures non-hashed node IDs for system cache groups 1 to 3. NOTE: Only applicable in the non-hashed mode.
sys_cache_group_hn_count_u_rnfbesam_nid760x0000968D0064mixedMixed types. See bit-field details.0x00000000Indicates number of HN-Fs in system cache groups 0 to 3.
gic_mem_region_reg_u_rnfbesam_nid760x0000968D5864mixedMixed types. See bit-field details.0x00000000Configures GIC memory region.
cml_port_aggr_mode_ctrl_reg_u_rnfbesam_nid760x0000968E0064mixedMixed types. See bit-field details.0x00000000Configures the CCIX port aggregation modes for all non-hashed memory regions.
cml_port_aggr_grp0_add_mask_u_rnfbesam_nid760x0000968E0864mixedMixed types. See bit-field details.0x00000040Configures the CCIX port aggregation address mask for group 0.
cml_port_aggr_grp1_add_mask_u_rnfbesam_nid760x0000968E1064mixedMixed types. See bit-field details.0x00000040Configures the CCIX port aggregation address mask for group 1.
cml_port_aggr_grp0_reg_u_rnfbesam_nid760x0000968E4064mixedMixed types. See bit-field details.0x00000000Configures the CCIX port aggregation port IDs for group 0.
cml_port_aggr_grp1_reg_u_rnfbesam_nid760x0000968E4864mixedMixed types. See bit-field details.0x00000000Configures the CCIX port aggregation port IDs for group 1.