CPM_LSBUS_REF_CTRL (CPM4_CRX) Register Description
| Register Name | CPM_LSBUS_REF_CTRL |
|---|---|
| Relative Address | 0x0000000104 |
| Absolute Address | 0x00FCA00104 (CPM4_CRX) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x02002500 |
| Description | Enable and Divider controls for cpm_lsbus_clk. All configuration and interrupt registers run on this clock |
CPM_LSBUS_REF_CTRL (CPM4_CRX) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:26 | roRead-only | 0x0 | This field is reserved |
| CLKACT | 25 | rwNormal read/write | 0x1 | This field must always be set to 1 |
| Reserved | 24:18 | roRead-only | 0x0 | This field is reserved |
| DIVISOR | 17:8 | rwNormal read/write | 0x25 | 10 bit divider Note: Field name reference: DIVISOR0 |
| Reserved | 7:3 | roRead-only | 0x0 | This field is reserved |
| Reserved | 2:0 | roRead-only | 0x0 | This field is reserved |