CTL (CFRAME_REG) Register Description
| Register Name | CTL |
|---|---|
| Relative Address | 0x0000000080 |
| Absolute Address |
0x00F12D0080 (CFRAME00_REG) 0x00F12D2080 (CFRAME01_REG) 0x00F12D4080 (CFRAME02_REG) 0x00F12D6080 (CFRAME03_REG) 0x00F12D8080 (CFRAME04_REG) 0x00F12DA080 (CFRAME05_REG) 0x00F12DC080 (CFRAME06_REG) 0x00F12DE080 (CFRAME07_REG) 0x00F12E0080 (CFRAME08_REG) 0x00F12E2080 (CFRAME09_REG) 0x00F12E4080 (CFRAME10_REG) 0x00F12E6080 (CFRAME11_REG) 0x00F12E8080 (CFRAME12_REG) 0x00F12EA080 (CFRAME13_REG) 0x00F12EC080 (CFRAME14_REG) 0x00F12EE080 (CFRAME_BCAST_REG) |
| Width | 128 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Control Registers |
CTL (CFRAME_REG) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 127:3 | razRead as zero | 0x0 | Reserved |
| PER_FRAME_CRC | 0 | rwNormal read/write | 0x0 | Enable per frame CRC mode This bit should be set in the header of the bitstream and turned off in the footer. |