Cfg_UR_Err_Dis (CPM4_DMA_ATTR) Register Description
| Register Name | Cfg_UR_Err_Dis |
|---|---|
| Relative Address | 0x00000000A4 |
| Absolute Address | 0x00FCA700A4 (CPM4_DMA_ATTR) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | UR error response disable for CfgRd requests. In case of PCIE core returns a UR response on RC interface: If attr_dma_cfg_ur_err_dis=1, it returns OK on axilite response and 0xFFFFFFF on data bus. If 0, DECERR response is returned. |
This register should only be written to during reset of the PCIe block Alternate register name: attr_dma_cfg_ur_err_dis
Cfg_UR_Err_Dis (CPM4_DMA_ATTR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| attr | 0 | rwNormal read/write | 0x0 | UR error response disable for CfgRd requests. In case of PCIE core returns a UR response on RC interface: If attr_dma_cfg_ur_err_dis=1, it returns OK on axilite response and 0xFFFFFFF on data bus. If 0, DECERR response is returned. |