Ch0_H2c_AXI_dsc (CPM4_DMA_ATTR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

Ch0_H2c_AXI_dsc (CPM4_DMA_ATTR) Register Description

Register NameCh0_H2c_AXI_dsc
Relative Address0x00000008B4
Absolute Address 0x00FCA708B4 (CPM4_DMA_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionFetch descriptors from AXI MM interface

This register should only be written to during reset of the PCIe block Alternate register name: attr_dma_ch0_h2c_axi_dsc

Ch0_H2c_AXI_dsc (CPM4_DMA_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr 0rwNormal read/write0x0Fetch descriptors from AXI MM interface