Ch1_MultQ (CPM4_DMA_ATTR) Register Description
Register Name | Ch1_MultQ |
---|---|
Relative Address | 0x00000008E8 |
Absolute Address | 0x00FCA708E8 (CPM4_DMA_ATTR) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | The channel has multiq enabled. 1 - MULTQ, 0 - XDMA |
This register should only be written to during reset of the PCIe block Alternate register name: attr_dma_ch1_multq
Ch1_MultQ (CPM4_DMA_ATTR) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
attr | 0 | rwNormal read/write | 0x0 | The channel has multiq enabled. 1 - MULTQ, 0 - XDMA |