Ch3_Stream (CPM4_DMA_ATTR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

Ch3_Stream (CPM4_DMA_ATTR) Register Description

Register NameCh3_Stream
Relative Address0x0000000944
Absolute Address 0x00FCA70944 (CPM4_DMA_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionThe channel is streaming vs memory mapped.

This register should only be written to during reset of the PCIe block Alternate register name: attr_dma_ch3_stream

Ch3_Stream (CPM4_DMA_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr 0rwNormal read/write0x0The channel is streaming vs memory mapped.