DST_ADDR2_LOW (CPM4_ADDRREMAP) Register Description
Register Name | DST_ADDR2_LOW |
---|---|
Relative Address | 0x0000000068 |
Absolute Address | 0x00FCF30068 (CPM4_ADDRREMAP) |
Width | 32 |
Type | rwNormal read/write |
Reset Value | 0x00000000 |
Description | Aperture 2 - Destination Address - Bits [31:0] These registers are programmed by tools for use with CCIX options and are then re-programmed by CCIX-DVSEC FW to setup CCIX SAM to local address remap. User should not change the values in this register space. |
DST_ADDR2_LOW (CPM4_ADDRREMAP) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
field_reserved | 31:16 | rwNormal read/write | 0x0 | field_reserved |
size_low | 15:0 | rwNormal read/write | 0x0 | This field indicates the 16 LSB bit encodings for the Pool Size supported by Memory Pool 7. The Total Pool Size Capability, in integer multiples of 64KB, is indicated by the combination of the Lower and Upper Bits of the Memory Pool Size Capability field or [MemPoolSizeCapHi, MemPoolSizeCapLo] [MemPoolSizeCapHi,MemPoolSizeCapLo]: Size Capability. Examples: [00000000h, 0000h]: 64K Pool Size Capability. [00000000h, 05FFh]: 96MB Pool Size Capability. [00000000h, FFFFh]: 4GB Pool Size Capability. [00000001h, 7FFFh]: 6GB Pool Size Capability. |