Design_Use_Mode (CPM4_DMA_ATTR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

Design_Use_Mode (CPM4_DMA_ATTR) Register Description

Register NameDesign_Use_Mode
Relative Address0x0000000E00
Absolute Address 0x00FCA70E00 (CPM4_DMA_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionIndicates Architectural Modes of operation of PCIe-A
core

Alternate register name: attr_design_use_mode

Design_Use_Mode (CPM4_DMA_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr 6:0rwNormal read/write0x0Indicates Architectural Modes of operation of PCIe-A
core