ERR_CTRL (APU_DUAL_CSR) Register Description
| Register Name | ERR_CTRL |
|---|---|
| Relative Address | 0x0000000000 |
| Absolute Address | 0x00FD5C0000 (APU_DUAL_CSR) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Control register |
ERR_CTRL (APU_DUAL_CSR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| PSLVERR | 0 | rwNormal read/write | 0x0 | When an APB access to unimplemented register space occurs, this bit determines whether to raise PSLVERR. This is independent of ISR.INV_APB. |