Enable_Secure (CPM4_DMA_ATTR) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

Enable_Secure (CPM4_DMA_ATTR) Register Description

Register NameEnable_Secure
Relative Address0x0000000034
Absolute Address 0x00FCA70034 (CPM4_DMA_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionInterconnect supports the security feature for the AXI-Lite destination:
0: AxProt[1] is ignored and all transactions reaches the destination
1: If AxProt[1]=0, then the transaction reach the destination.
1: If AxProt[1]=1, then the transaction does not reach the destination.

This register should only be written to during reset of the PCIe block Alternate register name: attr_dma_enable_secure

Enable_Secure (CPM4_DMA_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr 0rwNormal read/write0x0Interconnect supports the security feature for the AXI-Lite destination:
0: AxProt[1] is ignored and all transactions reaches the destination
1: If AxProt[1]=0, then the transaction reach the destination.
1: If AxProt[1]=1, then the transaction does not reach the destination.