FAR (CFRAME_REG) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

FAR (CFRAME_REG) Register Description

Register NameFAR
Relative Address0x0000000010
Absolute Address 0x00F12D0010 (CFRAME00_REG)
0x00F12D2010 (CFRAME01_REG)
0x00F12D4010 (CFRAME02_REG)
0x00F12D6010 (CFRAME03_REG)
0x00F12D8010 (CFRAME04_REG)
0x00F12DA010 (CFRAME05_REG)
0x00F12DC010 (CFRAME06_REG)
0x00F12DE010 (CFRAME07_REG)
0x00F12E0010 (CFRAME08_REG)
0x00F12E2010 (CFRAME09_REG)
0x00F12E4010 (CFRAME10_REG)
0x00F12E6010 (CFRAME11_REG)
0x00F12E8010 (CFRAME12_REG)
0x00F12EA010 (CFRAME13_REG)
0x00F12EC010 (CFRAME14_REG)
0x00F12EE010 (CFRAME_BCAST_REG)
Width128
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionFrame Address Register (FAR)

The FAR register can be written directly or can be auto-incremented at the end of each frame. The typical bit-stream starts at address 0 and auto-increments to the final count. Note: This address gets reset to 0 on POR. The Cframe state machine runs a self learn after POR reset and therefore the address will be left at the last self learn address which is block type 6 and all 1s frame_addr

FAR (CFRAME_REG) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved127:25razRead as zero0x0reserved
SEGMENT24:23rwNormal read/write0x0This is supported only for write. For read this should be set to 00.
00 - Both Segments
01 - Bottom Segment
10 - Top Segment
11 - N/A
BLOCKTYPE22:20rwNormal read/write0x0Block Type
FRAME_ADDR19:0rwNormal read/write0x0Selects a frame within a major column.