GICD_ISENABLER0 (APU_GIC_DIST_MAIN) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

GICD_ISENABLER0 (APU_GIC_DIST_MAIN) Register Description

Register NameGICD_ISENABLER0
Relative Address0x0000000100
Absolute Address 0x00F9000100 (APU_GIC_DIST_MAIN)
Width32
TyperwNormal read/write
Reset Value0x0000FFFF
DescriptionInterrupt Set-Enable Registers

GICD_ISENABLER0 (APU_GIC_DIST_MAIN) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
_31:0rwNormal read/write0xFFFFInterrupt Set-Enable Registers