GICD_ISENABLER3 (APU_GIC_DIST_MAIN) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

GICD_ISENABLER3 (APU_GIC_DIST_MAIN) Register Description

Register NameGICD_ISENABLER3
Relative Address0x000000010C
Absolute Address 0x00F900010C (APU_GIC_DIST_MAIN)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionInterrupt Set-Enable Registers

GICD_ISENABLER3 (APU_GIC_DIST_MAIN) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
_31:0rwNormal read/write0x0Interrupt Set-Enable Registers