GICD_SETSPI_SR (APU_GIC_DIST_MAIN) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

GICD_SETSPI_SR (APU_GIC_DIST_MAIN) Register Description

Register NameGICD_SETSPI_SR
Relative Address0x0000000050
Absolute Address 0x00F9000050 (APU_GIC_DIST_MAIN)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionSecure SPI Set Register

GICD_SETSPI_SR (APU_GIC_DIST_MAIN) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
GICD_SETSPI_SR_9_0 9:0rwNormal read/write0Secure SPI Set Register