GICH_APR (APU_GIC_A72_VIFCTL) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

GICH_APR (APU_GIC_A72_VIFCTL) Register Description

Register NameGICH_APR
Relative Address0x00000000F0
Absolute Address 0x00F90500F0 (APU_GIC_VIFCTL)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionGICH_APR

GICH_APR (APU_GIC_A72_VIFCTL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Active 3:0rwNormal read/write0