GICH_EISR0 (APU_GIC_A72_VIFCTL) Register Description
| Register Name | GICH_EISR0 |
|---|---|
| Relative Address | 0x0000000020 |
| Absolute Address | 0x00F9050020 (APU_GIC_VIFCTL) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x00000000 |
| Description | GICH_EISR0 |
GICH_EISR0 (APU_GIC_A72_VIFCTL) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| List | 3:0 | roRead-only | 0 |