GICH_HCR (APU_GIC_A72_VIFCTL) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

GICH_HCR (APU_GIC_A72_VIFCTL) Register Description

Register NameGICH_HCR
Relative Address0x0000000000
Absolute Address 0x00F9050000 (APU_GIC_VIFCTL)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionGICH_HCR

GICH_HCR (APU_GIC_A72_VIFCTL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
EOICount31:27rwNormal read/write0
VGrp1DIE 7rwNormal read/write0
VGrp1EIE 6rwNormal read/write0
VGrp0DIE 5rwNormal read/write0
VGrp0EIE 4rwNormal read/write0
NPIE 3rwNormal read/write0
LRENPIE 2rwNormal read/write0
UIE 1rwNormal read/write0
En 0rwNormal read/write0