GICR_ICFGR0 (APU_GIC_REDIST_SGISPI) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

GICR_ICFGR0 (APU_GIC_REDIST_SGISPI) Register Description

Register NameGICR_ICFGR0
Relative Address0x0000000C00
Absolute Address 0x00F9090C00 (APU_GIC_REDIST_SGISPI_0)
0x00F90B0C00 (APU_GIC_REDIST_SGISPI_1)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionInterrupt Configuration Registers

GICR_ICFGR0 (APU_GIC_REDIST_SGISPI) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
_31:0roRead-only0x0Interrupt Configuration Registers