GICR_MISCSTATUSR (APU_GIC_REDIST_SGISPI) Register Description
| Register Name | GICR_MISCSTATUSR |
|---|---|
| Relative Address | 0x000000C000 |
| Absolute Address |
0x00F909C000 (APU_GIC_REDIST_SGISPI_0) 0x00F90BC000 (APU_GIC_REDIST_SGISPI_1) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | GIC-500 Miscellaneous Status Register |
GICR_MISCSTATUSR (APU_GIC_REDIST_SGISPI) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| GICR_MISCSTATUSR_31 | 31 | rwNormal read/write | 0 | GIC-500 Miscellaneous Status Register |
| GICR_MISCSTATUSR_2 | 2 | rwNormal read/write | 0 | GIC-500 Miscellaneous Status Register |
| GICR_MISCSTATUSR_1 | 1 | rwNormal read/write | 0 | GIC-500 Miscellaneous Status Register |
| GICR_MISCSTATUSR_0 | 0 | rwNormal read/write | 0 | GIC-500 Miscellaneous Status Register |