GICR_PENDBASER_lower (APU_GIC_REDIST_CTLLPI) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

GICR_PENDBASER_lower (APU_GIC_REDIST_CTLLPI) Register Description

Register NameGICR_PENDBASER_lower
Relative Address0x0000000078
Absolute Address 0x00F9080078 (APU_GIC_REDIST_CTLLPI_0)
0x00F90A0078 (APU_GIC_REDIST_CTLLPI_1)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionLPI Pending Table Control Register (lower)

GICR_PENDBASER_lower (APU_GIC_REDIST_CTLLPI) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
GICR_PENDBASER_lower_31_1631:16rwNormal read/write0x0LPI Pending Table Control Register (lower)
GICR_PENDBASER_lower_9_7 9:7rwNormal read/write0x0LPI Pending Table Control Register (lower)